(Preliminary) PL123E-09
Low Skew Zero Delay Buffer
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944 -0800 • fax +1(408) 474-1000 • www.micrel.com Rev 12/13/11 Page 4
ABSOLUTE MAXIMUM CONDITIONS
Supply Voltage to Ground Potential ...... –0.5V to 4.6V
DC Input Voltage ............................ V
SS
– 0.5V to 4.6V
Storage Temperature ..........................–65°C to 150°C
Junction Temperature ..................................... 150°C
Static Discharge Voltage
(per MIL-STD-883, Method 3015)……………..> 2000V
OPERATING CONDITIONS
Load Capacitance, <100 MHz, 3.3V
Load Capacitance, <100 MHz, 2.5V with High Drive
Load Capacitance, <133.3 MHz, 3.3V
Load Capacitance, <133.3 MHz, 2.5V with High Drive
Load Capacitance, <133.3 MHz, 2.5V with Standard Drive
Load Capacitance, >133.3 MHz, 3.3V
Load Capacitance, >133.3 MHz, 2.5V with High Drive
Closed-loop bandwidth (typical), 3.3V
Closed-loop bandwidth (typical), 2.5V
Output Impedance (typical), 3.3V High Drive
Output Impedance (typical), 3.3V Standard Drive
Output Impedance (typical), 2.5V High Drive
Output Impedance (typical), 2.5V Standard Drive
Power-up time for all V
DD
’s to reach minimum specified
voltage (power ramps must be monotonic)
Notes:
4. Applies to Test Circuit #1.
5. Applies to both REF Clock and internal feedback path on CLKOUT.
6. Theta Ja, EIA JEDEC 51 test board conditions, 2S2P; Theta Jc Mil-Spec 883E Method 1012.1.