6A259
8-BIT ADDRESSABLE
DMOS POWER DRIVER
www.allegromicro.com
7
TERMINAL DESCRIPTIONS
A6A259KA A6A259KLB
(DIP) (SOIC)
Terminal No. Terminal No. Terminal Name Function
1 1 OUT
2
Current-sinking, open-drain DMOS output, address 010.
2 2 OUT
3
Current-sinking, open-drain DMOS output, address 011.
33 S
1
Binary-coded output-select input.
4 4 LOGIC GROUND Reference terminal for input voltage measurements.
5 5, 6 POWER GROUND Reference terminal for output voltage measurements
(OUT
0-3
).
6 7, 8 POWER GROUND Reference terminal for output voltage measurements
(OUT
4-7
).
79 S
2
Binary-coded output-select input, most-significant bit.
8 10 ENABLE Mode control input; see Function Table.
9 11 OUT
4
Current-sinking, open-drain DMOS output, address 100.
10 12 OUT
5
Current-sinking, open-drain DMOS output, address 101.
11 13 OUT
6
Current-sinking, open-drain DMOS output, address 110.
12 14 OUT
7
Current-sinking, open-drain DMOS output, address 111.
13 15 DATA CMOS data input to the addressed output latch. When
enabled, the addressed output inverts the data input
(DATA = HIGH, OUTPUT = LOW).
14 16 CLEAR Mode control input; see Function Table.
15 17, 18 POWER GROUND Reference terminal for output voltage measurements
(OUT
4-7
).
16 19, 20 POWER GROUND Reference terminal for output voltage measurements
(OUT
0-3
).
17 21 LOGIC SUPPLY (V
DD
) The logic supply voltage (typically 5 V).
18 22 S
0
Binary-coded output-select input, least-significant bit.
19 23 OUT
0
Current-sinking, open-drain DMOS output, address 000.
20 24 OUT
1
Current-sinking, open-drain DMOS output, address 001.
NOTE —Power grounds must be connected together externally.
