AX8052F143
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performed in software, adding to the flexibility of the AES
engine. ECB (electronic codebook), CFB (cipher feedback)
and OFB (output feedback) modes are directly supported
without software intervention.
Crystal Oscillator and TCXO Interface
(RF Reference Oscillator)
The AX8052F143 is normally operated with an external
TCXO, which is required by most narrow−band regulation
with a tolerance of 0.5 ppm to 1.5 ppm depending on the
regulation. The on−chip crystal oscillator allows the use of
an inexpensive quartz crystal as the RF generation
subsystem’s timing reference when possible from a
regulatory point of view.
A wide range of crystal frequencies can be handled by the
crystal oscillator circuit. As the reference frequency impacts
both the spectral performance of the transmitter as well as
the current consumption of the receiver, the choice of
reference frequency should be made according to the
regulatory regime targeted by the application. Application
Notes for usage of AX5043 in compliance with various
regulatory regimes also apply to AX8052F143.
The crystal or TCXO reference frequency should be
chosen so that the RF carrier frequency is not an integer
multiple of the crystal or TCXO frequency.
The oscillator circuit is enabled by programming the
AX5043_PWRMODE register. At power−up it is enabled.
To adjust the circuit’s characteristics to the quartz crystal
being used, without using additional external components,
the tuning capacitance of the crystal oscillator can be
programmed. The transconductance of the oscillator is
automatically regulated, to allow for fastest start−up times
together with lowest power operation during steady−state
oscillation.
The integrated programmable tuning capacitor bank
makes it possible to connect the oscillator directly to pins
CLK16N and CLK16P without the need for external
capacitors. It is programmed using bits XTALCAP[5:0] in
register AX5043_XTALCAP.
To synchronize the receiver frequency to a carrier signal,
the oscillator frequency could be tuned using the capacitor
bank however, the recommended method to implement
frequency synchronization is to make use of the high
resolution RF frequency generation sub−system together
with the Automatic Frequency Control, both are described
further down.
Alternatively a single ended reference (TXCO, CXO)
may be used. The CMOS levels should be applied to
CLK16P via an AC coupling with the crystal oscillator
enabled. For detailed TCXO network recommendations
depending on TCXO output swing refer to the AX5043
Application Note: Use with a TCXO Reference Clock.
Low Power Oscillator and Wake on Radio (WOR) Mode
The AX8052F143 transceiver features an internal lowest
power fully integrated oscillator. In default mode the
frequency of oscillation is 640 Hz ± 1.5%, in fast mode it is
10.2 kHz ± 1.5%.
If Wake on Radio Mode is enabled, the receiver wakes up
periodically at a user selectable interval, and checks for a
radio signal on the selected channel. If no signal is detected,
the receiver shuts down again. If a radio signal is detected,
and a valid packet is received, the microcontroller is alerted
by asserting an interrupt.
SYSCLK Output
The SYSCLK pin outputs the RF reference clock signal
divided by a programmable integer. Divisions from 1 to
2048 are possible. For divider ratios > 1 the duty cycle is
50%. Bits SYSCLK[3:0] in the AX5043_PINCFG1 register
set the divider ratio. The SYSCLK output can be disabled.
Power−on−Reset (POR) and RESET_N Input
AX8052F143 has an integrated power−on−reset block
which is edge sensitive to VDD_IO. For many common
application cases no external reset circuitry is required.
However, if VDD_IO ramps cannot be guaranteed, an
external reset circuit is recommended. For detailed
recommendations and requirements see the AX8052
Application Note: Power On Reset.
After POR or reset all registers are set to their default
values.
The RESET_N pin contains a weak pull−up. However, it
is strongly recommended to connect the RESET_N pin to
VDD_IO if not used, for additional robustness.
The AX8052F143 can be reset by software as well. The
microcontroller is reset by writing 1 to the SWRESET bit of
the PCON register. The transceiver can be reset by first
writing 1 and then 0 to the RST bit in the
AX5043_PWRMODE register.
