Recommendations STGIF7CH60TS-L
16/25 DocID026580 Rev 6
6 Recommendations
1. Input signals HIN, LIN are active-high logic. A 500 k (typ.) pull-down resistor is built-in
for each high side input. To prevent input signal oscillation, the wiring of each input
should be as short as possible and the use of RC filters (R1, C1) on each input signal is
suggested. The filters should be done with a time constant of about 100 ns and must be
placed as close as possible to the IPM input pins.
2. The bypass capacitor Cvcc (aluminum or tantalum) is recommended to reduce the
transient circuit demand on the power supply. In addition, a decoupling capacitor C
2
(100 to 220 nF, with low ESR and low ESL) is suggested, to reduce high frequency
switching noise distributed on the power supply lines. It must be placed as close as
possible to each Vcc pin and in parallel to the bypass capacitor.
3. The use of RC filter (RSF, CSF) for preventing protection circuit malfunction is
recommended. The time constant (RSF x CSF) should be set to 1us and the filter must
be placed as close as possible to the CIN pin.
4. The SD
is an input/output pin (open drain type if used as output). It should be pulled up
to MCU power supply (3.3/5 V) by a resistor higher than 1.0 k in order to keep I
od
lower than 5 mA. The filter on SD
has to be sized to get a desired re-starting time after
a fault event and placed as close as possible to the SD
pin.
5. To increase the noise immunity of the TSO thermal sensor, it is recommended to
parallel a decoupling capacitor C
TSO
between 1nF and 10nF. Similarly, if the NTC
thermistor is available and used, it is recommended to parallel a decoupling capacitor
C
OT
between 10nF and 100nF. In both cases, the capacitors must be placed close to
the MCU.
6. The decoupling capacitor C
3
(100 to·220 nF, with low ESR and low ESL) in parallel with
each C
boot
is recommended to filter high frequency disturbances. Both C
boot
and C
3
must be placed as close as possible to the U,V,W and V
boot
pins. Bootstrap negative
electrodes should be connected to U,V,W terminals directly and separated from the
main output wires.
7. A Zener diode (Dz1) between each V
cc
pin and GND, and in parallel (Dz2) with each
Cboot is suggested in order to prevent overvoltage.
8. The decoupling capacitor C
4
(100 to 220 nF, with low ESR and low ESL) in parallel with
the electrolytic capacitor Cvdc is recommended, in order to prevent surge destruction.
Both capacitors C
4
and Cvdc should be placed as close as possible to the IPM (C
4
has
priority over Cvdc).
9. By integrating an application-specific type HVIC inside the module, direct coupling to
the MCU terminals without an opto-coupler is possible.
10. Low inductance shunt resistors should be used for phase leg current sensing
11. In order to avoid malfunctions, the wiring between N pins, the shunt resistor and
PWR_GND should be as short as possible.
12. It is recommended to connect SGN_GND to PWR_GND at only one point (near the
terminal of shunt resistor), in order to avoid any malfunction due to power ground
fluctuation.
