MAX1742/MAX1842
1A/2.7A, 1MHz, Step-Down Regulators with
Synchronous Rectification and Internal Switches
14 ______________________________________________________________________________________
The constant-current source stops charging once the
voltage across the soft-start capacitor reaches 1.8V
(Figure 5).
Extended Current Limit (MAX1842)
For applications requiring occasional short bursts of
high output current (up to 2.7A), the MAX1842 provides
a higher current-limit threshold. When using the
MAX1842, choose external components capable of
withstanding its higher peak current limit.
The MAX1842 is capable of delivering large output cur-
rents for limited durations, and its thermal characteris-
tics allow it to operate at continuously higher output
currents. Figure 6 shows its maximum recommended
continuous output current versus ambient temperature.
Figure 7 shows the maximum recommended burst cur-
rent versus the output current duty cycle at high tem-
peratures.
Figure 7 assumes that the output current is a square
wave with a 100Hz frequency. The duty cycle is
defined as the duration of the burst current divided by
the period of the square wave. This figure shows the
limitations for continuous bursts of output current.
Note that if the thermal limitations of the MAX1842 are
exceeded, it will enter thermal shutdown to prevent
destructive failure.
Frequency Variation with Output Current
The operating frequency of the MAX1742/MAX1842 is
determined primarily by t
OFF
(set by R
TOFF
), V
IN
, and
V
OUT
as shown in the following formula:
f
PWM
= (V
IN
- V
OUT
- V
PMOS
) / [t
OFF
(V
IN
- V
PMOS
+
V
NMOS
)]
However, as the output current increases, the voltage
drop across the NMOS and PMOS switches increases
and the voltage across the inductor decreases. This
causes the frequency to drop. The change in frequency
can be approximated with the following formula:
Δf
PWM
= -I
OUT
x R
PMOS
/ (V
IN
x t
OFF
)
where R
PMOS
is the resistance of the internal MOSFETs
(90mΩ typ).
Circuit Layout and Grounding
Good layout is necessary to achieve the MAX1742/
MAX1842s’ intended output power level, high efficiency,
and low noise. Good layout includes the use of a ground
plane, careful component placement, and correct rout-
ing of traces using appropriate trace widths. The follow-
ing points are in order of decreasing importance:
1) Minimize switched-current and high-current ground
loops. Connect the input capacitor’s ground, the out-
put capacitor’s ground, and PGND. Connect the
resulting island to GND at only one point.
2) Connect the input filter capacitor less than 5mm
away from IN. The connecting copper trace carries
large currents and must be at least 1mm wide,
preferably 2.5mm.
