MAX1742/MAX1842
1A/2.7A, 1MHz, Step-Down Regulators with
Synchronous Rectification and Internal Switches
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_______________Detailed Description
The MAX1742/MAX1842 synchronous, current-mode,
constant-off-time, PWM DC-DC converters step down
input voltages of 3V to 5.5V to a preset output voltage of
2.5V, 1.8V, or 1.5V, or to an adjustable output voltage
from 1.1V to V
IN
. Both devices deliver up to 1A of contin-
uous output current; the MAX1842 delivers bursts of out-
put current up to 2.7A (see the Extended Current Limit
section). Internal switches composed of a 0.09Ω PMOS
power switch and a 0.07Ω NMOS synchronous rectifier
switch improve efficiency, reduce component count, and
eliminate the need for an external Schottky diode.
The MAX1742/MAX1842 optimize efficiency by operat-
ing in constant-off-time mode under heavy loads and in
Maxim’s proprietary Idle Mode under light loads. A sin-
gle resistor-programmable constant-off-time control
sets switching frequencies up to 1MHz, allowing the
user to optimize performance trade-offs in efficiency,
switching noise, component size, and cost. Under low-
dropout conditions, the device operates in a 100%
duty-cycle mode, where the PMOS switch remains con-
tinuously on. Idle Mode enhances light-load efficiency
by skipping cycles, thus reducing transition and gate-
charge losses.
When power is drawn from a regulated supply, constant-
off-time PWM architecture essentially provides constant-
frequency operation. This architecture has the inherent
advantage of quick response to line and load transients.
The MAX1742/MAX1842s’ current-mode, constant-off-
time PWM architecture regulates the output voltage by
changing the PMOS switch on-time relative to the con-
stant off-time. Increasing the on-time increases the
peak inductor current and the amount of energy trans-
ferred to the load per pulse.
Modes of Operation
The current through the PMOS switch determines the
mode of operation: constant-off-time mode (for load
currents greater than half the Idle Mode threshold), or
Idle Mode (for load currents less than half the Idle
Mode threshold). Current sense is achieved through a
proprietary architecture that eliminates current-sensing
I
2
R losses.
Constant-Off-Time Mode
Constant-off-time operation occurs when the current
through the PMOS switch is greater than the Idle Mode
threshold current (which corresponds to a load current
of half the Idle Mode threshold). In this mode, the regu-
lation comparator turns the PMOS switch on at the end
of each off-time, keeping the device in continuous-con-
duction mode. The PMOS switch remains on until the
output is in regulation or the current limit is reached.
When the PMOS switch turns off, it remains off for the
programmed off-time (t
OFF
). To control the current
under short-circuit conditions, the PMOS switch
remains off for approximately 4 x t
OFF
when V
OUT
<
V
OUT(NOM)
/ 4.
Idle Mode
Under light loads, the devices improve efficiency by
switching to a pulse-skipping Idle Mode. Idle Mode
operation occurs when the current through the PMOS
switch is less than the Idle Mode threshold current. Idle
Mode forces the PMOS to remain on until the current
through the switch reaches the Idle Mode threshold,
thus minimizing the unnecessary switching that
degrades efficiency under light loads. In Idle Mode, the
device operates in discontinuous conduction. Current-
sense circuitry monitors the current through the NMOS
synchronous switch, turning it off before the current
reverses. This prevents current from being pulled from
the output filter through the inductor and NMOS switch to
ground. As the device switches between operating
modes, no major shift in circuit behavior occurs.
100% Duty-Cycle Operation
When the input voltage drops near the output voltage,
the duty cycle increases until the PMOS MOSFET is on
continuously. The dropout voltage in 100% duty cycle
is the output current multiplied by the on-resistance of
the internal PMOS switch and parasitic resistance in the
inductor. The PMOS switch remains on continuously as
long as the current limit is not reached.
Shutdown
Drive SHDN to a logic-level low to place the
MAX1742/MAX1842 in low-power shutdown mode and
reduce supply current to less than 1µA. In shutdown, all
circuitry and internal MOSFETs turn off, and the LX
node becomes high impedance. Drive SHDN to a
logic-level high or connect to V
CC
for normal operation.
Summing Comparator
Three signals are added together at the input of the
summing comparator (Figure 2): an output voltage error
signal relative to the reference voltage, an integrated
output voltage error correction signal, and the sensed
PMOS switch current. The integrated error signal is pro-
vided by a transconductance amplifier with an external
capacitor at COMP. This integrator provides high DC
accuracy without the need for a high-gain amplifier.
Connecting a capacitor at COMP modifies the overall
loop response (see the Integrator Amplifier section).
