8
RT8106/A
www.richtek.com
DS8106/A-04 April 2011
Application Information
Overview
The RT8106/A is a high efficiency synchronous buck PWM
controller that can generate adjustable DC output voltage.
This device is embedded with high current High Side and
Low Side MOSFET drivers, and many protection functions
(OCP, UVP, OVP) into a tiny package. Simple board
design and low BOM cost can be easily achieved by the
high integration feature to make this part to be an ideal
solution for general applications.
Chip Enable/Disable
Pull pin 7 (COMP/EN) to be lower than 0.5V can shut
down the device. This allows flexible power sequence
control for specified application. Setting free this pin can
enable the RT8106/A again.
Power On Reset (POR)
The RT8106/A automatically initializes upon applying of
input power (at the V
CC
) pin. The power on reset function
(POR) continually monitors the V
CC
supply voltage. The
POR threshold is typically 4.1V at V
CC
rising.
Input Power (Vin) Detection
The RT8106/A continuously generates a 10kHz pulse train
with 1us pulse width to turn on the upper MOSFET for
detecting the existence of V
IN
after V
CC
POR and Comp/
EN pin enabled. As shown in Figure 1. the LX pin voltage
is monitored during the detection period. If the LX pin
voltage exceeds 1.5V threshold for four times, the V
IN
existence is recognized and the RT8106/A initiates its
soft start cycle.
+
-
LX
UGATE
1.5V
Internal Counter will count (V
LX
> 1.5V)
four times (rising & falling) to recognize
V
IN
is ready.
1st 2nd
3rd
4th
LX
waveform
Figure 1. V
IN
Power Detection
Soft Start
A built-in soft-start is used to prevent surge current from
V
IN
to V
OUT
during power on. The soft-start (SS)
automatically begins once the existence of V
IN
is detected.
The internal soft-start capacitor is charged and generates
a linear ramping voltage across the capacitor. This voltage
clamps the feedback voltage at the FB pin, causing PWM
pulse width increasing slowly to reduce the output surge
current. The soft-start cycle stops while the voltage across
SS capacitor is higher than the nominal feedback voltage
0.8V.
Output Voltage Setting
The RT8106/A can regulate an output voltage as low to as
0.8V and maintains it within ±0.8% accuracy. Higher output
voltage can be achieved by adding an offset resistor R
OFFSET
between FB pin and GND. The steady state output voltage
will be set as the formula :
FB
OUT REF
OFFSET
R
V = V 1+
R
⎛⎞
×
⎜⎟
⎝⎠
Under Voltage Protection (UVP)
The VOS pin voltage is monitored for under voltage
protection after soft-start completes. If the VOS voltage
drops to below UV threshold (typically 75% x V
REF
), the
UVP is triggered and the RT8106/A turns off High Side
and Low Side gate drivers. The RT8106/A will not be
released from this latch condition unless V
CC
POR is
recognized.
Over Voltage Protection (OVP)
The VOS pin is also acted as over voltage detection after
POR. If the VOS voltage rises above OVP threshold
(typically 125% x V
REF
), OVP is triggered. The RT8106/
A turns off High Side gatedriver and turns Low Side gate
drivers always on. The Low Side gate driver will not be
turned off until VOS falls below 0.4V. The RT8106/A will
not be released from this latch condition unless V
CC
POR
is recognized.
PGOOD
The RT8106/A will assert PGOOD signal after the soft-
start completes and the VOS voltage is within power good
range. If VOS voltage runs outside of the range, the
RT8106/A de-asserts the PGOOD signal but continues
switching and regulating. The PGOOD is an open drain
output pin and thus requires an external pull-up resistor.
