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125932-HMC674LC3C

P1-P3P4-P6P7-P9P10-P12P13-P14
HMC674LC3C/HMC674LP3E Data Sheet
Rev. K | Page 4 of 14
AC SPECIFICATIONS
Table 4.
Parameter Min Typ Max Unit Test Conditions/Comments
PROPAGATION DELAY (t
PDL,
t
PD
, t
PDH
)
80
85
110
ps
V
OD
= 500 mV
Temperature Coefficient 0.45 ps/°C
Skew (Rising to Falling Transition) 10 ps V
OD
= 500 mV
V
OD
1
DISPERSION
10
ps
50 mV < V
OD
< 1 V
PROPAGATION DELAY (t
PD
) vs. INPUT COMMON-MODE VOLTAGE (V
CM
)
DISPERSION
8 ps V
OD
= 500 mV,
−1.75 V < V
CM
< +1.75 V
NOISE (RETURN TO INPUT, RTI) 5.9 nV/√Hz
EQUIVALENT INPUT BANDWIDTH (BW
EQ
)
2
8.6 9.3 12 GHz
JITTER 10 Gbps with ±100 mV overdrive
Deterministic 2 ps p-p
Random 0.2 ps rms
INPUT SIGNAL MINIMUM PULSE WIDTH
60
ps
V
CM
= 0 V, ±100 mV overdrive
Q/
Q
TIME From 20% to 80%
Rise 24 ps
Fall 15 ps
1
V
OD
is the input overdrive voltage, for example, (V
INP
− V
INN
− V
OS
), where V
OS
is the input offset voltage.
2
Equivalent input bandwidth is calculated by
)(
22
EQ
TRINTRCOMP
BW
−0.22/
=
where:
TRIN is the 20%/80% transition time of a quasi Gaussian signal applied to the comparator input.
TRCOMP is the effective transition time digitized by the comparator.
POWER SUPPLY SPECIFICATIONS
Table 5.
Parameter Symbol Min Typ Max Unit
VOLTAGE
Power Supply Voltage Input Stage V
CCI
3.135 3.3 3.465 V
Power Supply Voltage Output Stage V
CCO
1.8 3.3 3.465 V
Negative Power Supply (−3 V) V
EE
−3.15 −3.0 −2.85 V
CURRENT
Supply Input I
CCI
9 mA
Supply Output I
CCO
45 mA
V
EE
I
EE
19 mA
POWER DISSIPATION P
D
140 mW
POWER SUPPLY REJECTION RATIO PSRR
V
CCI
38
dB
V
EE
38 dB
Data Sheet HMC674LC3C/HMC674LP3E
Rev. K | Page 5 of 14
TIMING DESCRIPTIONS
Table 6.
Parameter Symbol Description
Input to Output High Delay
t
PDH
The propagation delay measured from the time the input signal crosses the reference
(± the input offset voltage) to the 50% point of an output low to high transition.
Input to Output Low Delay t
PDL
The propagation delay measured from the time the input signal crosses the reference
(± the input offset voltage) to the 50% point of an output high to low transition.
Latch Enable (LE/
LE
) to Output High Delay t
PLOH
The propagation delay measured from the 50% point of the latch enable (LE/
LE
)
signal high to low transition to the 50% point of an output low to high transition.
Latch Enable (LE/
LE
) to Output Low Delay t
PLOL
The propagation delay measured from the 50% point of the latch enable (LE/
LE
)
signal high to low transition to the 50% point of an output high to low transition.
Minimum Hold Time t
H
The minimum time after the positive transition of the latch enable (LE/
LE
) signal
that the input signal must remain unchanged to be acquired and held at the outputs.
Minimum Latch Enable (LE/
LE
) Pulse Width t
PL
The minimum time that the latch enable (LE/
LE
) signal must be low to acquire an
input signal change.
Minimum Setup Time t
S
The minimum time before the positive transition of the latch enable (LE/
LE
) signal
that an input signal change must be present to be acquired and held at the outputs.
Output Rise Time t
R
The amount of time required to transition from a low to a high output as measured
at the 20% and 80% points.
Output Fall Time t
F
The amount of time required to transition from a high to a low output as measured
at the 20% and 80% points.
Input Overdrive Voltage V
OD
The difference between the input voltages (V
INP
and V
INN
).
Timing Diagram
LATCH ENABLE (LE)
DIFFERENTIAL
INPUT VOLTAGE
LATCH ENABLE (LE)
Q OUTPUT
Q OUTPUT
LATCH TRACK LATCH LATCH
50%
50%
50%
V
CM
± V
OS
TRACK
t
H
V
IN
V
OD
t
F
t
S
t
PL
t
PDL
t
PDH
t
PLOH
t
PLOL
t
R
14861-002
Figure 2. Timing Diagram
HMC674LC3C/HMC674LP3E Data Sheet
Rev. K | Page 6 of 14
ABSOLUTE MAXIMUM RATINGS
Table 7.
Parameter Rating
Supply Voltage
Input (V
CCI
to GND) −0.5 V to +4 V
Output (V
CCO
to GND) −0.5 V to +4 V
Positive Differential (V
CCI
to V
CCO
) −0.5 V to +3.3 V
V
EE
Supply to GND −3.3 V to +0.5 V
Input Voltage −2 V to +2 V
Differential −2 V to +2 V
Latch Enable (LE/
LE
)
−0.5 V to V
CCI
+ 0.5 V
Applied Voltage (HYS) V
EE
to GND
Current
Maximum Input ±20 mA
Output 40 mA
Continuous Power Dissipation (P
DISS
), T
A
= 85°C
Derate 43.5 mW/°C Above 85°C
(HMC674LP3E)
1.74 W
Derate 20.4 mW/°C Above 85°C
(HMC674LC3C)
0.816 W
Junction Temperature 125°C
Maximum Peak Reflow Temperature
1
MSL1 and MSL3 260°C
Thermal Resistance (θ
JC
)
HMC674LP3E 23°C/W
HMC674LC3C 49°C/W
Storage Temperature Range −65°C to +150°C
Operating Temperature Range
−40°C to +85°C
ESD Sensitivity, Human Body Model (HBM) Class 1A
1
See the Ordering Guide section.
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
ESD CAUTION
P1-P3P4-P6P7-P9P10-P12P13-P14

125932-HMC674LC3C

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Buy 125932-HMC674LC3C
Manufacturer:
Analog Devices / Hittite
Description:
Amplifier IC Development Tools Eval BOARD
Lifecycle:
New from this manufacturer.
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