ADM222/ADM232A/ADM242
–4–
V
IN
V
OUT
50pF
3k
SHDN
Figure 5. Shutdown Test Circuit
+ 5V
TRANSMITTER
OUTPUT
SHDN
INPUT
– 5V
V+
0V
3V
V–
t
DT
Figure 6. Transmitter Shutdown Disable Timing
2
4
6
5
12
11
13
10
3
7
15
8
14
9
18
*
INTERNAL 400k PULL-UP RESISTOR
ON EACH TTL/CMOS INPUT
**
INTERNAL 5k PULL-DOWN RESISTOR
ON EACH RS-232 INPUT
+5V TO +10V
VOLTAGE DOUBLER
+5V TO –10V
VOLTAGE INVERTER
C1+
C1–
V+
V–
C2+
C2–
T1
ADM222
T2
R1
R2
C1
0.1F
C2
0.1F
C3
0.1F
GND
TTL/CMOS
OUTPUTS
R1
OUT
R2
OUT
T1
OUT
T2
OUT
R1
IN
R2
IN
T1
IN
T2
IN
TTL/CMOS
INPUTS
*
RS-232
OUTPUTS
RS-232
INPUTS
**
5V INPUT
C5
0.1F
6.3V
SHDN
16
C4
0.1F
V
CC
17
Figure 7. ADM222 Typical Operating Circuit
PIN FUNCTION DESCRIPTION
Mnemonic Function
V
CC
Power Supply Input, 5 V ± 10%.
V+ Internally generated positive supply (+10 V
nominal).
V– Internally generated negative supply (–10 V
nominal).
GND Ground Pin. Must be connected to 0 V.
C1+ External capacitor 1, (+ terminal) is connected
to this pin.
C1– External capacitor 1, (– terminal) is connected
to this pin.
C2+ External capacitor 2, (+ terminal) is connected
to this pin.
C2– External capacitor 2, (– terminal) is connected
to this pin.
T
IN
Transmitter (Driver) Inputs. These inputs accept
TTL/CMOS levels. An internal 400 kΩ pull-up
resistor to V
CC
is connected on each input.
T
OUT
Transmitter (Driver) Outputs. These are RS-232
levels (typically ±9 V).
R
IN
Receiver Inputs. These inputs accept RS-232
signal levels. An internal 5 kΩ pull-down resistor
to GND is connected on each of these inputs.
R
OUT
Receiver Outputs. These are TTL/CMOS levels.
NC No Connect. No connections are required to
this pin.
EN (ADM242 Only) Active Low Digital Input. May
be used to enable or disable (three-state) both
receiver outputs.
SHDN (ADM222 and ADM242) Active Low Digital
Input. May be used to disable the device so that
the power consumption is minimized. On the
ADM222 all drivers and receivers are disabled.
On the ADM242 the drivers are disabled but the
receivers remain enabled.
18
17
16
15
14
13
12
11
10
1
2
3
4
5
6
7
8
9
TOP VIEW
(Not to Scale)
ADM222
NC = NO CONNECT
R2
IN
T2
OUT
NC
C1+
V+
C1–
V–
C2–
C2+
T2
IN
SHDN
V
CC
GND
T1
OUT
T1
IN
R1
OUT
R1
IN
R2
OUT
Figure 8. ADM222 DIP and SOIC Pin Configurations
