REV.
ADM222/ADM232A/ADM242
–7–
GENERAL INFORMATION
The ADM222/ADM232A/ADM242 are high-speed RS-232
drivers/receivers requiring a single digital 5 V supply. The RS-232
standard requires transmitters that will deliver ± 5 V minimum
on the transmission channel and receivers that can accept signal
levels down to ± 3 V. The parts achieve this by integrating step-
up voltage converters and level-shifting transmitters and receivers
onto the same chip. CMOS technology is used to keep the
power dissipation to an absolute minimum. All devices con-
tain an internal charge pump voltage doubler and a voltage
inverter that generates ± 10 V from the 5 V input. Four exter-
nal 0.1 µF capacitors are required for the internal charge pump
voltage converter.
The ADM222/ADM232A/ADM242 is a modification, enhance-
ment and improvement to the AD230-AD241 family and
derivatives thereof. It is essentially plug-in-compatible and does
not have materially different applications.
CIRCUIT DESCRIPTION
The internal circuitry consists of four main sections. These are:
Charge Pump Voltage Converter
TTL/CMOS to RS-232 Transmitters
RS-232 to TTL/CMOS Receivers
Enable and Shutdown Functions.
Charge Pump DC-DC Voltage Converter
The Charge Pump Voltage converter consists of an oscillator
and a switching matrix. The converter generates a ±10 V supply
from the input 5 V level. This is done in two stages using a
switched capacitor technique. The 5 V input supply is doubled
to 10 V using capacitor C1 as the charge storage element. The
–10 V level is also generated from the input 5 V supply using C1
and C2 as the storage elements.
Capacitors C3 and C4 are used to reduce the output ripple.
Their values are not critical and can be reduced if higher levels
of ripple are acceptable. The charge pump capacitors C1 and
C2 may also be reduced at the expense of higher output imped-
ance on the V+ and V– supplies.
The V+ and V– supplies may also be used to power external
circuitry if the current requirements are small. Please refer to
the typical performance characteristics which shows the V+, V–
output voltage vs. current.
In the shutdown mode the charge pump is disabled and V+
decays to V
CC
while V– decays to 0 V.
Transmitter (Driver) Section
The Drivers convert TTL/CMOS input levels into RS-232
output levels. With V
CC
= 5 V and driving a typical RS-232
load, the output voltage swing is ±9 V. Even under worst-case
conditions the drivers are guaranteed to meet the ± 5 V RS-232
minimum requirement.
The input threshold levels are both TTL- and CMOS-compat-
ible with the switching threshold set at V
CC
/4. With a nominal
V
CC
= 5 V, the switching threshold is 1.25 V typical. Unused
inputs may be left unconnected, as an internal 400 kΩ pull-up
resistor pulls them high forcing the outputs into a low state.
As required by the RS-232 standard, the slew rate is limited to
less than 30 V/µs without the need for an external slew limiting
capacitor, and the output impedance in the power-off state is
greater than 300 Ω.
Receiver Section
The receivers are inverting level-shifters that accept RS-232
input levels (±3 V to ± 15 V) and translate them into 5 V TTL/
CMOS levels. The inputs have internal 5 kΩ pull-down resistors
to ground and are also protected against overvoltages of up to
± 30 V. The guaranteed switching thresholds are 0.8 V mini-
mum and 2.4 V maximum, which are well within the ± 3 V
RS-232 requirement. The low level threshold is deliberately
positive as it ensures that an unconnected input will be inter-
preted as a low level.
The receivers have Schmitt trigger input with a hysteresis level
of 0.5 V. This ensures error-free reception for both noisy inputs
and for inputs with slow transition times
Enable and Shutdown Functions
On the ADM222, both receivers are fully disabled during
shutdown.
On the ADM242, both receivers continue to operate normally.
This function is useful for monitoring activity so that when it
occurs, the device can be taken out of the shutdown mode.
The ADM242 also contains a receiver enable function (EN)
which can be used to fully disable the receivers, independent
of SHDN.
APPLICATIONS INFORMATION
A selection of typical operating circuits is shown in TPCs 1–6
and Figure 13.
10
90
100
0%
5V
A1
5
s
2.0V
5V
Figure 13. Transmitter Output Disable Timing
