LTC3607
6
3607fb
For more information www.linear.com/LTC3607
pin FuncTions
PV
IN1
, PV
IN2
, SV
IN
(Pins 6, 7, 3/Pins 4, 5, 1): Main Power
Supply. Must be closely decoupled to GND. These inputs
may each be powered from different supply voltages.
Connect SV
IN
to either PV
IN1
or PV
IN2
, whichever one
is higher. For applications where it’s not known which
PV
IN(1 or 2)
is higher, connect external diodes between SV
IN
to both PV
IN1
and PV
IN2
to ensure that SV
IN
is less than a
diode drop from the higher of PV
IN1
or PV
IN2
.
PGND1, PGND2, SGND, PGND (Pins 4, 9, 10, 12, Exposed
Pad Pin 17/Pins 2, 7, 8, 10, Exposed Pad Pin 17): Main
Ground. Connect to the (–) terminals of C
OUT1
, C
OUT2
, and
C
IN
. The exposed pad must be soldered to PCB ground for
electrical contact and rated thermal performance. All SGND
and PGND pins must be externally connected to ground.
V
FB1
(Pin 15/Pin 13): Regulator 1 Output Feedback.
Receives the feedback voltage from the external resistor
divider across the regulator 1 output. Nominal voltage for
this pin is 0.6V.
SW1 (Pin 5/Pin 3): Regulator 1 Switch Node Connection
to the Inductor. This pin switches from PV
IN1
to PGND1.
RUN1 (Pin 16/Pin 14): Regulator 1 Enable. Forcing this
pin high (above 3V) enables regulator 1, while forcing it
to SGND causes regulator 1 to shut down. It is possible
to use a 3.3V source to drive this pin, or tie it to SV
IN
.
An internal soft-start limits the rise time to a minimum
of 0.35ms.
PGOOD1 (Pin 2/Pin 16): Regulator 1 Power Good. This
common-drain logic output is pulled to SGND when the
channel 1 output voltage is not within ±8.5% of regulation.
V
FB2
(Pin 14/Pin 12): Regulator 2 Output Feedback.
Receives the feedback voltage from the external resistor
divider across the regulator 2 output. Nominal voltage for
this pin is 0.6V.
SW2 (Pin 8/Pin 6): Regulator 2 Switch Node Connection
to the Inductor. This pin switches from PV
IN2
to PGND2.
RUN2 (Pin 13/Pin 11): Regulator 2 Enable. Forcing this
pin high (above 3.0V) enables regulator 2, while forcing
it to SGND causes regulator 2 to shut down. It is possible
to use a 3.3V source to drive this pin, or tie it to SV
IN
.
An internal soft-start limits the rise time to a minimum
of 0.35ms.
PGOOD2 (Pin 11/Pin 9): Regulator 2 Power Good. This
common-drain logic output is pulled to SGND when the
channel 2 output voltage is not within ±8.5% of regulation.
MODE/SYNC (Pin 1/Pin 15): Combination Mode Selec
-
tion and Oscillator Synchronization. This pin controls the
ligh
t-load behavior of the device. Forcing this pin to SGND
selects pulse-skipping mode. Floating this pin or forcing
it above 1V selects Burst Mode operation. The internal
oscillation frequency can be synchronized to an external
oscillator applied to this pin and pulse-skipping mode is
automatically selected.
(QFN/MSE)
