Copyright © Cirrus Logic, Inc. 2005
(All Rights Reserved)
http://www.cirrus.com
CS5550
Two-channel, Low-cost A/D Converter
Features
z Power Consumption <12 mW
- with VD+ = 3.3 V
z Adjustable Input Range on AIN1±
z GND-referenced Signals with Single Supply
z On-chip 2.5 V Reference (25 ppm/°C typ)
z Simple Three-wire Digital Serial Interface
z Power Supply Configurations
VA+ = +5 V; AGND = 0 V; VD+ = +3.3 V to +5 V
Description
The CS5550 combines two ∆Σ ADCs and a serial
interface on a single chip. The CS5550 has
on-chip functionality to facilitate offset and gain
calibration. The CS5550 features a bi-directional
serial interface for communication with a
microcontroller.
ORDERING INFORMATION:
CS5550-IS -40°C to +85°C 24-pin SSOP
CS5550-ISZ -40°C to +85°C, Lead-free 24-pin SSOP
VA+ VD+
VREFIN
VREFOUT
AGND XIN XOUT CPUCLK DGND
CS
SDO
SDI
SCLK
INT
Voltage
Reference
Clock
Generator
Serial
Interface
x1
RESET
Digital
Filter
+
4th Order ∆Σ
Modulator
2nd Order ∆Σ
Modulator
Digital
Filter
AIN2+
AIN2-
AIN1+
AIN1-
Config
Register
Output
Registers
Calibration
Registers
-
+
-
10x,50x
10x
MAR ‘05
DS630F1
CS5550
2 DS630F1
TABLE OF CONTENTS
1. PIN DESCRIPTION ................................................................................................................... 4
2. CHARACTERISTICS/SPECIFICATIONS ................................................................................. 5
ANALOG CHARACTERISTICS................................................................................................ 5
VOLTAGE REFERENCE.......................................................................................................... 6
5 V DIGITAL CHARACTERISTICS........................................................................................... 7
3 V DIGITAL CHARACTERISTICS........................................................................................... 7
RECOMMENDED OPERATING CONDITIONS ....................................................................... 7
SWITCHING CHARACTERISTICS .......................................................................................... 8
2.1 Theory of Operation .........................................................................................................10
2.1.1 High-Rate Digital Low-Pass Filters ..................................................................... 10
2.1.2 Digital Compensation Filters ............................................................................... 10
2.1.3 Gain and Offset Adjustment ................................................................................ 10
2.2 Performing Measurements ............................................................................................... 10
2.3 CS5550 Linearity Performance ........................................................................................ 10
3. FUNCTIONAL DESCRIPTION ............................................................................................... 11
3.1 Analog Inputs ................................................................................................................... 11
3.2 Voltage Reference ...........................................................................................................11
3.3 Oscillator Characteristics .................................................................................................11
3.4 Calibration ........................................................................................................................ 12
3.4.1 Overview of Calibration Process ......................................................................... 12
3.4.2 Calibration Sequence .......................................................................................... 12
3.4.3 Calibration Signal Input Level ............................................................................. 12
3.4.4 Input Configurations for Calibrations ................................................................... 12
3.4.5 Description of Calibration Algorithms .................................................................. 12
3.4.5.1 Offset Calibration Sequence ............................................................... 12
3.4.5.2 Gain Calibration Sequence ................................................................. 13
3.4.6 Duration of Calibration Sequence ....................................................................... 13
3.5 Interrupt ........................................................................................................................... 13
3.5.1 Typical use of the INT pin ................................................................................... 13
3.5.2 INT Active State .................................................................................................. 13
3.6 PCB Layout ...................................................................................................................... 14
4. SERIAL PORT OVERVIEW ....................................................................................................15
4.1 Commands ....................................................................................................................... 15
4.2 Serial Port Interface ......................................................................................................... 18
4.3 Serial Read and Write ......................................................................................................18
4.3.1 Register Write ..................................................................................................... 18
4.3.2 Register Read ..................................................................................................... 18
4.4 System Initialization .........................................................................................................18
4.5 Serial Port Initialization .................................................................................................... 19
4.6 CS5550 Power States ...................................................................................................... 19
5. REGISTER DESCRIPTION .................................................................................................... 20
5.1 Configuration Register ......................................................................................................20
5.2 Offset Registers ................................................................................................................ 21
5.3 Gain Registers .................................................................................................................. 21
5.4 Cycle Count Register........................................................................................................21
5.5 OUT1 and OUT2 Output Registers................................................................................... 22
5.6 FILT1, FILT2 Unsigned Output Register........................................................................... 22
5.7 Status Register and Mask Register .................................................................................. 22
5.8 Control Register................................................................................................................23
6. PACKAGE DIMENSIONS ....................................................................................................... 24
CS5550
DS630F1 3
LIST OF FIGURES
Figure 1. CS5550 Read and Write Timing Diagrams...................................................................... 9
Figure 2. Oscillator Connection..................................................................................................... 11
Figure 3. System Calibration of Gain. ...........................................................................................12
Figure 4. System Calibration of Offset. .........................................................................................12
Figure 5. Example of Gain Calibration .......................................................................................... 13
Table 1. Revision History
Revision Date Changes
PP1 October 2003 Initial release
PP2 August 2004 Update THD on AIN1.
Update Noise on AIN2.
Update PSRR on AIN2.
Delete AC Calibration references.
F1 March 2005 Added Lead-free Device Ordering Information
Contacting Cirrus Logic Support
For all product questions and inquiries contact a Cirrus Logic Sales Representative.
To find the one nearest to you go to
www.cirrus.com
IMPORTANT NOTICE
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to change without notice and is provided "AS IS" without warranty of any kind (express or implied). Customers are advised to obtain the latest version of relevant
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CS5550-ISZ

Mfr. #:
Manufacturer:
Cirrus Logic
Description:
Analog to Digital Converters - ADC 2-Ch Low-Cost 24-Bit ADC
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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