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MC100EP57DTR2G

P1-P3P4-P6P7-P9P10-P10
© Semiconductor Components Industries, LLC, 2014
April, 2014 − Rev. 13
1 Publication Order Number:
MC10EP57/D
MC10EP57, MC100EP57
3.3V / 5V ECL 4:1
Differential Multiplexer
Description
The MC10/100EP57 is a fully differential 4:1 multiplexer. By
leaving the SEL1 line open (pulled LOW via the input pulldown
resistors) the device can also be used as a differential 2:1 multiplexer
with SEL0 input selecting between D0 and D1. The fully differential
architecture of the EP57 makes it ideal for use in low skew
applications such as clock distribution.
The SEL1 is the most significant select line. The binary number
applied to the select inputs will select the same numbered data input
(i.e., 00 selects D0).
Multiple V
BB
outputs are provided. The V
BB
pin, an internally
generated voltage supply, is available to this device only. For
single−ended input conditions, the unused differential input is
connected to V
BB
as a switching reference voltage. V
BB
may also
rebias AC coupled inputs. When used, decouple V
BB
and V
CC
via a
0.01 mF capacitor and limit current sourcing or sinking to 0.5 mA.
When not used, V
BB
should be left open.
The 100 Series contains temperature compensation.
Features
• 375 ps Typical Propagation Delays
• Maximum Frequency > 2 GHz Typical
• PECL Mode Operating Range:
V
CC
= 3.0 V to 5.5 V with V
EE
= 0 V
• NECL Mode Operating Range:
V
CC
= 0 V with V
EE
= −3.0 V to −5.5 V
• Open Input Default State
• Safety Clamp on Inputs
• Q Output will default LOW with inputs open or at V
EE
• V
BB
Outputs
• Useful as Either 4:1 or 2:1 Multiplexer
• These Devices are Pb−Free and are RoHS Compliant
MARKING
DIAGRAM*
xxx = MC10 or 100
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb−Free Package
http://onsemi.com
(Note: Microdot may be in either location)
See detailed ordering and shipping information in the package
dimensions section on page 8 of this data sheet.
ORDERING INFORMATION
*For additional marking information, refer to
Application Note AND8002/D.
TSSOP−20
DT SUFFIX
CASE 948E
XXXX
EP57
ALYWG
G
1
20
QFN−20
MN SUFFIX
CASE 485E
XXXX
EP57
ALYWG
G
MC10EP57, MC100EP57
http://onsemi.com
2
Figure 1. 20−Lead Package (Top View) and Logic Diagram
D1D1 D2D0
1718 16 15 14 13 12
43
56789
SEL0
11
10
V
CC
Q V
CC
V
BB1
V
BB2
V
EE
D0
1920
21
V
CC
SEL1
D2V
CC
D3 V
EE
D3
4:1
Q
Warning: All V
CC
and V
EE
pins must be externally connected
to Power Supply to guarantee proper operation.
1
2
3
4
5
15
14
13
12
11
678910
20 19 18 17 16
Figure 1. QFN−20 Pinout (Top View)
SEL0
V
CC
Q
V
CC
SEL1V
CC
Q
V
CC
V
BB2
V
BB1
V
EE
D1
D1
D2
D0
D0
D2
D3 D3
V
EE
Exposed Pad
NOTE: The Exposed Pad (EP) on package bottom must be attached to a heat−sinking conduit.
The Exposed Pad may only be electrically connected to V
EE
.
MC10/100EP57
Table 1. PIN DESCRIPTION
PIN FUNCTION
D0 − 3*, D0 − 3* ECL Differential Data Inputs
SEL0*, SEL1* ECL MUX Select Inputs
V
BB1
, V
BB2
ECL Reference Output Voltage
Q, Q ECL Data Outputs
V
CC
Positive Supply
V
EE
Negative Supply
EP Exposed Pad
*Pins will default LOW when left open.
Table 2. TRUTH TABLE
SEL1 SEL0 DATA OUT
L L D0, D0
L H D1, D1
H L D2, D2
H H D3, D3
MC10EP57, MC100EP57
http://onsemi.com
3
Table 3. ATTRIBUTES
Characteristics Value
Internal Input Pulldown Resistor
75 kW
Internal Input Pullup Resistor N/A
ESD Protection Human Body Model
Machine Model
Charged Device Model
> 4 kV
> 100 V
> 2 kV
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) Pb Pkg Pb−Free Pkg
TSSOP−20
QFN−20
Level 1
N/A
Level 3
Level 1
Flammability Rating Oxygen Index: 28 to 34 UL 94 V−0 @ 0.125 in
Transistor Count 584 Devices
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.
Table 4. MAXIMUM RATINGS
Symbol Parameter Condition 1 Condition 2 Rating Unit
V
CC
PECL Mode Power Supply V
EE
= 0 V 6 V
V
EE
NECL Mode Power Supply V
CC
= 0 V −6 V
V
I
PECL Mode Input Voltage
NECL Mode Input Voltage
V
EE
= 0 V
V
CC
= 0 V
V
I
v V
CC
V
I
w V
EE
6
−6
V
V
I
out
Output Current Continuous
Surge
50
100
mA
mA
I
BB
V
BB
Sink/Source ± 0.5 mA
T
A
Operating Temperature Range −40 to +85 °C
T
stg
Storage Temperature Range −65 to +150 °C
q
JA
Thermal Resistance (Junction−to−Ambient) 0 lfpm
500 lfpm
TSSOP−20
TSSOP−20
140
100
°C/W
°C/W
q
JC
Thermal Resistance (Junction−to−Case) Standard Board TSSOP−20 23 to 41 °C/W
q
JA
Thermal Resistance (Junction−to−Ambient) 0 lfpm
500 lfpm
QFN−20
QFN−20
47
33
°C/W
°C/W
q
JC
Thermal Resistance (Junction−to−Case) Standard Board QFN−20 18 °C/W
T
sol
Wave Solder Pb
Pb−Free
265
265
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
P1-P3P4-P6P7-P9P10-P10

MC100EP57DTR2G

Mfr. #:
Buy MC100EP57DTR2G
Manufacturer:
ON Semiconductor
Description:
Encoders, Decoders, Multiplexers & Demultiplexers 3.3V/5V ECL Diff 4:1 Mux
Lifecycle:
New from this manufacturer.
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