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MAX158BCAI+T

P1-P3P4-P6P7-P9P10-P12
MAX154/MAX158
CMOS High-Speed 8-Bit ADCs with
Multiplexer and Reference
4 _______________________________________________________________________________________
__________________________________________Typical Operating Characteristics
(T
A
= +25°C, unless otherwise noted.)
2.520
2.480
-50 150
REFERENCE TEMPERATURE DRIFT
2.490
2.510
MX7824/28-1
AMBIENT TEMPERATURE (°C)
REF OUT VOLTAGE (V)
2.500
100
050
20
0
-100 150
OUTPUT CURRENT
vs. TEMPERATURE
4
12
16
MX7824/28-2
AMBIENT TEMPERATURE (°C)
OUTPUT CURRENT (mA)
8
100
-50 0 50
V
DD
= 5V
I
SOURCE
V
OUT
= 2.4V
I
SINK
V
OUT
= 0.4V
2.0
0
300 900
ACCURACY 
vs. DELAY BETWEEN CONVERSIONS (t
p
)
0.5
1.0
1.5
MX7824/28-3
t
p
(ns)
LINEARITY ERROR (LSB)
700 800400 500 600
V
DD
= 5V
V
REF
= 5V
2.0
0
05
ACCURACY vs. V
REF
[V
REF
= V
REF
(+) - V
REF
(-)]
0.5
1.0
1.5
MX7824/28-4
V
REF
(V)
LINEARITY ERROR (LSB)
3412
V
DD
= 5V
3k
3k
100pF
DGND
DBN
a. High-Z to V
OH
b. High-Z to V
OL
DBN
+5V
DGND
10pF
3k
3k
100pF
DGND
DBN
a. High-Z to V
OH
b. High-Z to V
OL
DBN
+5V
DGND
10pF
8
2
-100 150
POWER-SUPPLY CURRENT vs. TEMPERATURE
(NOT INCLUDING REFERENCE LADDER)
3
4
5
6
7
MX7824/28-5
AMBIENT TEMPERATURE (°C)
I
DD
– SUPPLY CURRENT (mA)
50 100-50 0
V
DD
= 5.25V
V
DD
= 5V
V
DD
= 4.75V
Figure 1. Load Circuits for Data-Access Time Test
Figure 2. Load Circuits for Data-Hold Time Test
MAX154/MAX158
CMOS High-Speed 8-Bit ADCs with
Multiplexer and Reference
_______________________________________________________________________________________ 5
Reference Output (2.5V) for MAX154REF OUT5
Three-State Data Output, bit 0 (LSB)DBO6
Three-State Data Output, bit 1DB17
Analog Input Channel 1AIN14
Analog Input Channel 2AIN23
Analog Input Channel 3AIN32
Analog Input Channel 4AIN41
_____________________________________________________________Pin Descriptions
Three-State Data Output, bit 2DB28
Three-State Data Output, bit 3DB39
Read Input. RD controls conversions and
data access. See
Digital Interface
section.
RD10
Three-State Data Output, bit 7 (MSB)DB720
GroundGND12
Lower Limit of Reference Span. Sets
the zero-code voltage.
Range: GND to V
REF
+.
V
REF
-13
Interrupt Output. INT going low indi-
cates the completion of a conversion.
See
Digital Interface
section.
INT11
Chip-Select Input. CS must be low for
the device to be selected.
CS16
Three-State Data Output, bit 4DB417
Three-State Data Output, bit 5DB518
Three-State Data Output, bit 6DB619
Interrupt Output. INTgoing low indi-
cates the completion of a conversion.
See
Digital Interface
section.
INT13
GroundGND14
Analog Input Channel 2AIN25
Analog Input Channel 1AIN16
Reference Output (2.5V) for MAX158 REF OUT7
Analog Input Channel 3AIN34
Analog Input Channel 4AIN43
Analog Input Channel 5AIN52
Analog Input Channel 6AIN61
Three-State Data Output, bit 0 (LSB)DB08
Three-State Data Output, bit 1DB19
Three-State Data Output, bit 2DB210
Three-State Data Output, bit 3DB311
Lower Limit of Reference Span. Sets
the zero-code voltage.
Range: GND to V
REF
+.
V
REF
-15
Read Input. RD controls conversions
and data access.
See
Digital Interface
section.
RD12
Ready Output. Open-drain output with
no active pull-up device. Goes low
when CSgoes low and high imped-
ance at the end of a conversion.
RDY17
Power-Supply Voltage, +5VV
DD
26
Channel Address 2 InputA223
Channel Address 1 InputA124
Channel Address 0 InputA025
Upper Limit of Reference Span. Sets
the full-scale input voltage.
Range: V
REF
- to V
DD
.
V
REF
+14
Ready Output. Open-drain output with
no active pull-up device. Goes low
when CS goes low and high imped-
ance at the end of a conversion.
RDY15
Power-Supply Voltage, +5VV
DD
24
Channel Address 1 InputA121
Channel Address 0 InputA022
No ConnectNC23
Three-State Data Output, bit 7 (MSB)DB722
Chip-Select input.
–
CS must be low for
the device to be selected.
CS18
Three-State Data Output, bit 4DB419
Three-State Data Output, bit 5DB520
Three-State Data Output, bit 6DB621
Analog Input Channel 8AIN827
Analog Input Channel 7AIN728
Upper Limit of Reference Span. Sets
the full-scale input voltage.
Range: V
REF
- to V
DD
.
V
REF
+16
PIN
MAX154
FUNCTIONNAME
PIN
MAX158
FUNCTIONNAME
MAX154/MAX158
CMOS High-Speed 8-Bit ADCs with
Multiplexer and Reference
6 _______________________________________________________________________________________
_______________Detailed Description
Converter Operations
The MAX154/MAX158 use what is commonly called a
"half-flash" conversion technique (Figure 3). Two 4-bit
flash ADC converter sections are used to achieve an 8-
bit result. Using 15 comparators, the upper 4-bit MS
(most significant) flash ADC compares the unknown
input voltage to the reference ladder and provides the
upper four data bits.
An internal DAC uses the MS bits to generate an analog
signal from the first flash conversion. A residue voltage
representing the difference between the unknown input
and the DAC voltage is then compared to the reference
ladder by 15 LS (least significant) flash comparators to
obtain the lower four output bits.
Operating Sequence
The operating sequence is shown in Figure 4. A conver-
sion is initiated by a falling edge of RD and CS. The
comparator inputs track the analog input voltage for
approximately 1µs. After this first cycle, the MS flash
result is latched into the output buffers and the LS con-
version begins. INT goes low approximately 600ns later,
indicating the end of the conversion, and that the lower
four bits are latched into the output buffers. The data
can then be accessed using the CSand RD inputs.
___________________Digital Interface
The MAX154/MAX158 use only Chip Select (CS) and
Read (RD) as control inputs. A READ operation, taking
CS and RD low, latches the multiplexer address inputs
and starts a conversion (Table 1).
There are two interface modes, which are determined
by the length of the RD input. Mode 0, implemented by
keeping RD low until the conversion ends, is designed
for microprocessors that can be forced into a WAIT
state. In this mode, a conversion is started with a READ
operation (taking CS and RD low), and data is read
when the conversion ends. Mode 1, on the other hand,
does not require microprocessor WAIT states. A READ
operation simultaneously initiates a conversion and
reads the previous conversion result.
4-BIT
DAC
THREE-
STATE
DRIVERS
ADDRESS
LATCH
DECODE
4-BIT
FLASH
ADC
(4LSB)
4-BIT
FLASH
ADC
(4MSB)
2.5V
REF
TIMING AND CONTROL
CIRCUITRY
MUX*
V
REF
+
V
REF
+
16
A0
*MAX154 – 4-Channel Mux
MAX158 – 8-Channel Mux
A1 A2
RDY CS RD
AIN1
AIN4
AIN8
REF OUT
V
REF
-
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
INT
MAX154/MX7824
A1 A0
MAX158/MX7828
A2 A1 A0
SELECTED
CHANNEL
00
01
10
11
000
001
010
011
AIN1
AIN2
AIN3
AIN4
Figure 3. Functional Diagram
Table 1. Truth Table for Input Channel
Selection
100
101
110
111
AIN5
AIN6
AIN7
AIN8
P1-P3P4-P6P7-P9P10-P12

MAX158BCAI+T

Mfr. #:
Buy MAX158BCAI+T
Manufacturer:
Maxim Integrated
Description:
Analog to Digital Converters - ADC 8-Bit 4Ch 400ksps 5V Precision ADC
Lifecycle:
New from this manufacturer.
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