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ADF4007BCPZ-RL7

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P17
ADF4007 Data Sheet
Rev. B | Page 12 of 16
USING THE ADF4007 AS A DIVIDER
In addition to its use as a standard PLL synthesizer, the ADF4007
can also be used as a high frequency counter/divider with a value
of 8, 16, 32, or 64.This can prove useful in a wide variety of
applications where a higher frequency signal is readily available.
Figure 14 shows the ADF4007 used in this manner with the
ADF4360-7.
This part is an integrated synthesizer and VCO, in this case
operating over a range of 1200 MHz to 1500 MHz. With divide-
by-8 chosen in the ADF4007 (N2 = 0, N1 = 0), the output range
is 150 MHz to 187.50 MHz.
ADF4360-7
ADF4007
470pF
6.8nF
6.2kΩ
13kΩ
220pF
CLK
DATA
LE
4.7kΩ
R
SET
CP
V
TUNE
17
18
RF
OUT
A
1nF
C
C
CPGND AGND DGND
AV
DD
DV
DD
V
VCO
C
N
10mF
V
VCO
CE
REF
IN
FREF
IN
1nF
MUXOUT
LOCK
DETECT
RF
IN
B
V
P
AV
DD
100pF
100pF
V
VCO
CMOS OUTPUT
51Ω
19
12
13
1
3
10
8
11
22
15
5
4
7
24
20
23
2
21
6
14
16
9
L2
51Ω
2.2nH
MUXOUT
REF
IN
PHASE
FREQUENCY
DETECTOR
MUX
CHARGE
PUMP
CP
R COUNTER
÷ 2
R
SET
N COUNTER
÷ 8, ÷ 16
÷ 32, ÷ 64
N1
N2
CPGND
GND
M2 M1
4.7kΩ
V
DD
SPI COMPATIBLE SERIAL BUS
RF
OUT
B
2.2nH
L1
1nF
V
DD
RF
IN
A
51Ω
04537-020
DV
DD
Figure 14. Using the ADF4007 to Divide-Down the Output of the ADF4360-7
Data Sheet ADF4007
Rev. B | Page 13 of 16
PCB DESIGN GUIDELINES FOR CHIP SCALE PACKAGE
The lands on the chip scale package (CP-20-6) are rectangular.
The printed circuit board pad for these should be 0.1 mm longer
than the package land length and 0.05 mm wider than the package
land width. Center the land on the pad to ensure that the solder
joint size is maximized.
The bottom of the chip scale package has a central thermal pad.
The thermal pad on the printed circuit board should be at least
as large as this exposed pad. The printed circuit board should have
a clearance of at least 0.25 mm between the thermal pad and the
inner edges of the pad pattern to ensure that shorting is avoided.
Thermal vias may be used on the printed circuit board thermal
pad to improve thermal performance of the package. If vias are
used, they should be incorporated in the thermal pad at 1.2 mm
pitch grid. The via diameter should be between 0.30 mm and
0.33 mm, and the via barrel should be plated with 1 oz. copper
to plug the via.
Connect the printed circuit board thermal pad to AGND.
ADF4007 Data Sheet
Rev. B | Page 14 of 16
OUTLINE DIMENSIONS
0.50
BSC
0.65
0.60
0.55
0.30
0.25
0.18
COMPLIANT
TO
JEDEC STANDARDS MO-220-WGGD-1.
BOTTOM VIEWTOP VIEW
EXPOSED
PAD
PIN 1
INDICATOR
4.10
4.00 SQ
3.90
SEATING
PLANE
0.80
0.75
0.70
0.05 MAX
0.02 NOM
0.20 REF
0.20 MIN
COPLANARITY
0.08
PIN 1
INDICATOR
2.30
2.10 SQ
2.00
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.
1
20
6
10
11
15
16
5
08-16-2010-B
Figure 15. 20-Lead Lead Frame Chip Scale Package [LFCSP_WQ]
4 mm × 4 mm Body, Very Very Thin Quad
(CP-20-6)
Dimensions shown in millimeters
ORDERING GUIDE
Model
1
Temperature Range Package Description Package Option
ADF4007BCPZ −40°C to +85°C 20-Lead Lead Frame Chip Scale Package [LFCSP_WQ] CP-20-6
ADF4007BCPZ-RL −40°C to +85°C 20-Lead Lead Frame Chip Scale Package [LFCSP_WQ] CP-20-6
ADF4007BCPZ-RL7 −40°C to +85°C 20-Lead Lead Frame Chip Scale Package [LFCSP_WQ] CP-20-6
EVAL-ADF4007EBZ1 Evaluation Board
1
Z = RoHS compliant part.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P17

ADF4007BCPZ-RL7

Mfr. #:
Buy ADF4007BCPZ-RL7
Manufacturer:
Analog Devices Inc.
Description:
Phase Locked Loops - PLL High Freq Divider/ Synthesizer
Lifecycle:
New from this manufacturer.
Delivery:
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