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Figure 8. The SYNC Pin Generates a Sync Pulse at
the Beginning of Each Switching Cycle.
CH2: GATE Pin, CH3: R
T
C
T
, CH4: SYNC Pin
Figure 9. Operation with External Sync.
CH2: SYNC Pin, CH3: GATE Pin, CH4: R
T
C
T
Pin
An external pulse signal can feed to the bidirectional
SYNC pin to synchronize the switch frequency. For reliable
operation, the sync frequency should be approximately 20%
higher than free running IC frequency. As show in Figure 9,
when the SYNC pin is triggered by an incoming signal, the
IC immediately discharges C
T
. The GATE signal is turned
on once the R
T
C
T
pin reaches the valley voltage. Because of
the steep falling edge, this valley voltage falls below the
regular 1.0 V threshold. However, the R
T
C
T
pin voltage is
then quickly raised by a clamp. When the R
T
C
T
pin reaches
the 0.95 V (typ) Valley Clamp Voltage, the clamp is
disconnected after a brief delay and C
T
is charged through
R
T
.
DESIGN GUIDELINES
Switch Frequency and Maximum Duty Cycle
Calculations
Oscillator timing capacitor, C
T
, is charged by V
REF
through R
T
and discharged by an internal current source.
During the discharge time, the internal clock signal sets the
Gate output to the low state, thus providing a user selectable
maximum duty cycle clamp. Charge and discharge times are
determined by following general formulas;
t
C
+ R
T
C
T
ln
ǒ
(V
REF
* V
VALLEY
)
(V
REF
* V
PEAK
)
Ǔ
t
d
+ R
T
C
T
ln
ǒ
(V
REF
* V
PEAK
* I
d
R
T
)
(V
REF
* V
VALLEY
* I
d
R
T
)
Ǔ
where:
t
C
= charging time;
t
d
= discharging time;
V
VALLEY
= valley voltage of the oscillator;
V
PEAK
= peak voltage of the oscillator.
Substituting in typical values for the parameters in the
above formulas, V
REF
= 3.3 V, V
VALLEY
= 1.0 V, V
PEAK
=
2.0 V, I
d
= 1.0 mA:
t
C
+ 0.57R
T
C
T
t
d
+ R
T
C
T
ln
ǒ
1.3 * 0.001R
T
2.3 * 0.001R
T
Ǔ
D
max
+
0.57
0.57 ) In
ǒ
1.3*0.001R
T
2.3*0.001R
T
Ǔ
It is noticed from the equation that for the oscillator to
function properly, R
T
has to be greater than 2.3 k.
Select RC for Feed Forward Ramp
If the line voltage is much greater than the FF pin Peak
Voltage, the charge current can be treated as a constant and
is equal to V
IN
/R. Therefore, the voltsecond value is
determined by:
V
IN
T
ON
+ (V
COMP
* V
FF(d)
) R C
where:
V
COMP
= COMP pin voltage;
V
FF(d)
= FF pin discharge voltage.
As shown in the equation, the voltsecond clamp is set by
the V
COMP
clamp voltage which is equal to 1.8 V. In
Forward or Flyback circuits, the voltsecond clamp value is
designed to prevent transformers from saturation.
In a buck or forward converter, voltsecond is equal to
V
IN
T
ON
+
ǒ
V
OUT
T
S
n
Ǔ
n = transformer turns ratio, which is a constant determined
by the regulated output voltage, switching period and
transformer turns ration (use 1.0 for buck converter). It is
interesting to notice from the aforementioned two equations
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0.0001
0.001
0.01
C
T
(mF)
0
800
Frequency (kHz)
400
700
600
500
300
200
100
1000
10000
1000000
R
T
(W)
0.50
1.00
Duty Cycle (%)
0.80
0.95
0.90
0.85
0.75
0.70
0.65
0.60
0.55
100000
Figure 10. Typical Performance Characteristics,
Oscillator Frequency vs. C
T
Figure 11. Typical Performance Characteristics,
Oscillator Duty Cycle vs. R
T
R
T
= 5.0 K
R
T
= 10 K
R
T
= 50 K
that during steady state, V
COMP
doesn’t change for input
voltage variations. This intuitively explains why FF voltage
mode control has superior line regulation and line transient
response. Knowing the nominal value of V
IN
and T
ON
, one
can also select the value of RC to place V
COMP
at the center
of its dynamic range.
Select Feedback Voltage Divider
As shown in Figure 12, the voltage divider output feeds to
the FB pin, which connects to the inverting input of the error
amplifier. The noninverting input of the error amplifier is
connected to a 1.27 V (typ) reference voltage. The FB pin
has an input current which has to be considered for accurate
DC outputs. The following equation can be used to calculate
the R1 and R2 value
ǒ
R2
R1 ) R2
Ǔ
V
OUT
+ 1.27
where is the correction factor due to the existence of the
FB pin input current Ier.
ʼn+(Ri ) R1ńńR2)Ier
Ri = DC resistance between the FB pin and the voltage
divider output.
Ier = V
FB
input current, 1.3 mA typical.
Design Voltage Dividers for OV and UV Detection
In Figure 13, the voltage divider uses three resistors in
series to set OV and UV threshold seen from the input
voltage. The values of the resistors can be calculated from
the following three equations, where the third equation is
derived from OV hysteresis requirement.
V
IN(LOW)
ǒ
R2 ) R3
R2 ) R3 ) R1
Ǔ
+ 1.0 V
(A)
V
IN(HIGH)
ǒ
R3
R2 ) R3 ) R1
Ǔ
+ 2.0 V
(B)
12.5 mA (R1 ) R2) + V
HYST
(C)
where:
V
IN(LOW)
, V
IN(HIGH)
= input voltage OV and UV
threshold;
V
HYST
= OV hysteresis seen at V
IN
It is selfevident from equation A and B that to use this
design, V
IN(HIGH)
has to be two times greater than
V
IN(LOW)
. Otherwise, two voltage dividers have to be used
to program OV and UV separately.
Figure 12. The Design of Feedback Voltage Divider
Has to Consider the Error Amplifier Input Current
+
+
V
OUT
R1
COMP
FB
R2
Ri
1.27
Ier
Figure 13. OV/UV Monitor Divider
V
IN
R1 R2 R3
V
UV
V
OV
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PACKAGE DIMENSIONS
SOIC16
D SUFFIX
CASE 751B05
ISSUE K
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
18
16 9
SEATING
PLANE
F
J
M
R
X 45
_
G
8 PLP
B
A
M
0.25 (0.010) B
S
T
D
K
C
16 PL
S
B
M
0.25 (0.010) A
S
T
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A 9.80 10.00 0.386 0.393
B 3.80 4.00 0.150 0.157
C 1.35 1.75 0.054 0.068
D 0.35 0.49 0.014 0.019
F 0.40 1.25 0.016 0.049
G 1.27 BSC 0.050 BSC
J 0.19 0.25 0.008 0.009
K 0.10 0.25 0.004 0.009
M 0 7 0 7
P 5.80 6.20 0.229 0.244
R 0.25 0.50 0.010 0.019
____
6.40
16X
0.58
16X
1.12
1.27
DIMENSIONS: MILLIMETERS
1
PITCH
SOLDERING FOOTPRINT
16
89
8X
PACKAGE THERMAL DATA
Parameter
SOIC16 Unit
R
q
JC
Typical 28 °C/W
R
q
JA
Typical 115 °C/W

NCP1294EDBR2G

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Switching Controllers ANA PWM VOLT MODE CNTR
Lifecycle:
New from this manufacturer.
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