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74HC4002PW-Q100,11
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
74HC_HCT4002_Q100
All informatio
n provided in thi
s document is su
bject to legal
disclaimers.
© NXP B.V
. 201
2. All rights rese
rved
.
Product data sheet
Rev
. 1 —
18 July 2012
9 of 14
NXP Semiconductors
74HC4002-Q100; 74HCT4002-Q100
Dual 4-input NOR gate
12. Package
outline
Fig 9.
Pac
kage outline SOT1
08-1 (SO14)
UNIT
A
max.
A
1
A
2
A
3
b
p
cD
(1)
E
(1)
(1)
eH
E
LL
p
QZ
y
w
v
θ
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
JEDEC
JEITA
mm
inches
1.75
0.25
0.10
1.45
1.25
0.25
0.49
0.36
0.25
0.19
8.75
8.55
4.0
3.8
1.27
6.2
5.8
0.7
0.6
0.7
0.3
8
0
o
o
0.25
0.1
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
1.0
0.4
SOT108-1
X
w
M
θ
A
A
1
A
2
b
p
D
H
E
L
p
Q
detail X
E
Z
e
c
L
v
M
A
(A )
3
A
7
8
1
14
y
076E06
MS-012
pin 1 index
0.069
0.010
0.004
0.057
0.049
0.01
0.019
0.014
0.0100
0.0075
0.35
0.34
0.16
0.15
0.05
1.05
0.041
0.244
0.228
0.028
0.024
0.028
0.012
0.01
0.25
0.01
0.004
0.039
0.016
99-12-27
03-02-19
0
2.5
5 mm
scale
SO14: plastic small outline package; 14 leads; body width 3.9 mm
SOT108-1
74HC_HCT4002_Q100
All informatio
n provided in thi
s document is su
bject to legal
disclaimers.
© NXP B.V
. 201
2. All rights rese
rved
.
Product data sheet
Rev
. 1 —
18 July 2012
10 of 14
NXP Semiconductors
74HC4002-Q100; 74HCT4002-Q100
Dual 4-input NOR gate
Fig 10.
Package ou
tline SOT402-1 (TSSOP14)
UNIT
A
1
A
2
A
3
b
p
cD
(1)
E
(2)
(1)
eH
E
LL
p
QZ
y
w
v
θ
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
JEDEC
JEITA
mm
0.15
0.05
0.95
0.80
0.30
0.19
0.2
0.1
5.1
4.9
4.5
4.3
0.65
6.6
6.2
0.4
0.3
0.72
0.38
8
0
o
o
0.13
0.1
0.2
1
DIMENSIONS (mm are the original dimensions)
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
0.75
0.50
SOT402-1
MO-153
99-12-27
03-02-18
w
M
b
p
D
Z
e
0.25
17
14
8
θ
A
A
1
A
2
L
p
Q
detail X
L
(A )
3
H
E
E
c
v
M
A
X
A
y
0
2.5
5 mm
scale
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm
SOT402-1
A
max.
1.1
pin 1 index
74HC_HCT4002_Q100
All informatio
n provided in thi
s document is su
bject to legal
disclaimers.
© NXP B.V
. 201
2. All rights rese
rved
.
Product data sheet
Rev
. 1 —
18 July 2012
1
1 of 14
NXP Semiconductors
74HC4002-Q100; 74HCT4002-Q100
Dual 4-input NOR gate
13. Abbreviations
14. Revision
history
T
able 10.
Abbreviations
Acronym
Description
CMOS
Complementary Met
al Oxide Semi
conductor
DUT
Device Under T
est
ESD
ElectroS
tatic Discharge
HBM
Human Body Model
MM
Machine Model
TTL
T
ransi
stor-T
rans
istor Logic
MIL
Military
T
able 1
1.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
74HC_HCT4002_Q1
00 v
.1
20120718
Product data sheet
-
-
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
74HC4002PW-Q100,11
Mfr. #:
Buy 74HC4002PW-Q100,11
Manufacturer:
Nexperia
Description:
Logic Gates 74HC4002PW-Q100/TSSOP14/REEL 1
Lifecycle:
New from this manufacturer.
Delivery:
DHL
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TNT
EMS
Payment:
T/T
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74HC4002PW-Q100,11