Lattice Semiconductor Parallel FIR Filter User’s Guide
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Introduction
This document serves as a guide containing technical information about the Lattice Parallel FIR Filter core.
Overview
The Parallel FIR Filter core is one of two FIR cores supported by Lattice. This core is designed to perform filtering
with zero latency and is well suited for real-time applications.
This Parallel FIR Filter core comes with the following documentation and files:
• Data sheet
• Protected netlist and database
• Protected RTL simulation models
• Source files for instantiating the core
Core Specification
Features
• Variable number of taps up to 64
• Data and coefficients up to 32 bits
• Output size consistent with data size
• Zero-latency operation
• Signed or unsigned data and coefficients
• Full arithmetic precision
• Fixed or loadable coefficients
• Decimation and interpolation
• Real or complex data
• Selectable rounding
• Scalable outputs
• Fully parallel implementation
• Multi-cycle modes for area/time tradeoffs
• Optimization based on symmetry of filter
General Description
Many digital systems use filters to remove noise, provide spectral shaping, or perform signal detection. Two types
of common filters that provide these functions are finite impulse response (FIR) and infinite impulse response (IIR)
filters. IIR filters are used in systems that can tolerate phase distortion. FIR filters are used in systems that require
linear phase and they have an inherently stable structure. For this reason, FIR filters are designed into a large num-
ber of systems.
The Parallel FIR Filter core can perform filtering with zero latency and is well suited for real-time applications. The
core supports two modes of computation/filtering: single-cycle mode and multi-cycle mode. In single-cycle, the fil-
tering is done in one clock cycle and in multi-cycle, filtering is done in multiple clock cycles.
Figure 1 shows the block diagram of the Parallel FIR Filter core.
