LPC2364_65_66_67_68 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 7.1 — 16 October 2013 48 of 69
NXP Semiconductors
LPC2364/65/66/67/68
Single-chip 16-bit/32-bit microcontrollers
11. Dynamic characteristics
[1] Parameters are valid over operating temperature range unless otherwise specified.
[2] Typical ratings are not guaranteed. The values listed are at room temperature (25 C), nominal supply voltages.
[3] LPC2364HBD only.
[4] Bus capacitance C
b
in pF, from 10 pF to 400 pF.
Table 9. Dynamic characteristics
T
amb
=
40
C to +85
C for standard devices,
40
C to +125
C for LPC2364HBD only, unless otherwise specified; V
DD(3V3)
over specified ranges.
[1]
Symbol Parameter Conditions Min Typ
[2]
Max Unit
ARM processor clock frequency
f
oper
operating frequency CCLK; 40 C to +85 C1 - 72 MHz
CCLK; > 85 C
[3]
1-60MHz
IRC; 40 C to +85 C 3.96 4 4.04 MHz
IRC; > 85 C
[3]
3.98 4.02 4.06 MHz
External clock
f
osc
oscillator frequency 1 - 25 MHz
T
cy(clk)
clock cycle time 40 - 1000 ns
t
CHCX
clock HIGH time T
cy(clk)
0.4 - - ns
t
CLCX
clock LOW time T
cy(clk)
0.4 - - ns
t
CLCH
clock rise time - - 5 ns
t
CHCL
clock fall time - - 5 ns
I
2
C-bus pins (P0[27] and P0[28])
t
f(o)
output fall time V
IH
to V
IL
20 + 0.1 C
b
[4]
--ns
SSP interface
t
su(SPI_MISO)
SPI_MISO set-up time T
amb
= 25 C; measured
in SPI Master mode; see
Figure 15
-11-ns
Fig 13. External clock timing (with an amplitude of at least V
i(RMS)
= 200 mV)
t
CHCL
t
CLCX
t
CHCX
T
cy(clk)
t
CLCH
002aaa907
