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LT8302ES8E#PBF

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LT8302
16
8302fc
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applicaTions inForMaTion
t
OFF
> 350ns
V
LEAKAGE
V
SW
<65V
<50V
TIME
8302 F05
t
SP
< 250ns
Figure 5. Maximum Voltages for SW Pin Flyback Waveform
In addition to the voltage spikes, the leakage inductance
also causes the SW pin ringing for a while after the power
switch turns off. To prevent the voltage ringing falsely trig
-
ger boundary mode detector, the LT8302 internally blanks
the boundary mode detector for approximately 250ns.
Any remaining voltage ringing after 250ns may turn the
power switch back on again before the secondary current
falls to zero. In this case, the LT8302 enters continuous
conduction mode. So the leakage inductance spike ringing
should be limited to less than 250ns.
To clamp and damp the leakage voltage spikes, a
(RC + DZ) snubber
circuit
in Figure6 is recommended.
The RC (resistor-capacitor) snubber quickly damps the
voltage spike ringing and provides great load regulation
and EMI performance. And the DZ (diode-Zener) ensures
well defined and consistent clamping voltage to protect
SW pin from exceeding its 65V absolute maximum rating.
Figure 6. (RC + DZ) Snubber Circuit
8302 F06
R
CZ
D
L
ℓ
•
•
then add capacitance until the period of the ringing is 1.5
to 2 times longer. The change in period determines the
value of the parasitic capacitance, from which the para
-
sitic inductance can be also determined from the initial
period. Once the value of the SW node capacitance and
inductance is known, a series resistor can be added to
the snubber capacitance to dissipate power and critically
damp the ringing. The equation for deriving the optimal
series resistance using the observed periods ( t
PERIOD
and
t
PERIOD(SNUBBED)
) and snubber capacitance (C
SNUBBER
) is:
C
PAR
=
C
SNUBBER
t
PERIOD(SNUBBED)
t
PERIOD
⎛
⎝
⎜
⎞
⎠
⎟
2
–
1
L
PAR
=
t
PERIOD
2
C
PAR
• 4π
2
R
SNUBBER
=
L
PAR
C
PAR
Note that energy absorbed by the RC snubber will be
converted to heat and will not be delivered to the load.
In high voltage or high current applications, the snubber
needs to be sized for thermal dissipation. A 470pF capaci
-
tor in series with a 39Ω resistor is a good starting point.
For the DZ
snubber, proper care should be taken when
choosing both the diode and the Zener diode. Schottky
diodes are typically the best choice, but some PN diodes
can be used if they turn on fast enough to limit the leak
-
age inductance
spike. Choose
a diode that has a reverse-
voltage rating higher than the maximum SW pin voltage.
The Zener diode breakdown voltage should be chosen to
balance power loss and switch voltage protection. The best
compromise is to choose the largest voltage breakdown
with 5V margin. Use the following equation to make the
proper choice:
V
ZENNER(MAX)
≤ 60V – V
IN(MAX)
For an application with a maximum input voltage of 32V,
choose a 24V Zener diode, the V
ZENER(MAX)
of which is
around 26V and below the 28V maximum. The power loss
in the DZ snubber determines the power rating of the Zener
diode. A 1.5W Zener diode is typically recommended.
The recommended approach for designing an RC snub-
ber is to measure the period of the ringing on the SW pin
when the power
switch turns off without the snubber and
LT8302
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8302fc
For more information www.linear.com/LT8302
applicaTions inForMaTion
Undervoltage Lockout (UVLO)
A resistive divider from V
IN
to the EN/UVLO pin imple-
ments undervoltage lockout (UVLO). The EN/UVLO enable
falling threshold is
set at 1.214V with 14mV hysteresis. In
addition, the EN/UVLO pin sinks 2.5µA when the voltage
on the pin is below 1.214V. This current provides user
programmable hysteresis based on the value of R1. The
programmable UVLO thresholds are:
V
IN(UVLO
+
)
=
1.228V • R1+R2
( )
R2
+ 2.5µA •R
1
V
IN(UVLO
–
)
=
1.214V • R1+ R2
( )
R2
Figure 7 shows the implementation of external shutdown
control while still using the UVLO function. The NMOS
grounds the EN/UVLO pin when turned on, and puts the
LT8302 in shutdown with quiescent current less than 2µA.
LT8302
GND
EN/UVLO
R1
RUN/STOP
CONTROL
(OPTIONAL)
R2
V
IN
8302 F07
Figure 7. Undervoltage Lockout (UVLO)
Minimum Load Requirement
The LT8302 samples the isolated output voltage from
the primary-side flyback pulse waveform. The flyback
pulse occurs once the primary switch turns off and the
secondary winding conducts current. In order to sample
the output voltage, the LT8302 has to turn on and off for a
minimum amount of time and with a minimum frequency.
The LT8302 delivers a minimum amount of energy even
during light load conditions to ensure accurate output volt
-
age information
. The minimum
energy delivery creates a
minimum load requirement, which can be approximately
estimated as:
I
LOAD(MIN)
=
L
P
2
RI
•I
SW(MIN)
• f
MIN
2• V
OUT
L
PRI
= Transformer primary inductance
I
SW(MIN)
= Minimum switch current limit = 1.04A (MAX)
f
MIN
= Minimum switching frequency = 12.7kHz (MAX)
The LT8302 typically needs less than 0.5% of its full output
power as minimum load. Alternatively, a Zener diode with
its breakdown of 10% higher than the output voltage can
serve as a minimum load if pre-loading is not acceptable.
For a 5V output, use a 5.6V Zener with cathode connected
to the output.
Output Short Protection
When the output is heavily overloaded or shorted to ground,
the reflected SW pin waveform rings longer than the in
-
ternal blanking time. After
the 350ns minimum switch-off
time, the excessive ringing falsely triggers the boundary
mode detector and turns the power switch back on again
before the secondary current falls to zero. Under this
condition, the LT8302 runs into continuous conduction
mode at 380kHz maximum switching frequency. If the
sampled R
REF
voltage is still less than 0.6V after 11ms
(typ) soft-start timer, the LT8302 initiates a new soft-start
cycle. If the sampled R
REF
voltage is larger than 0.6V after
11ms, the switch current may run away and exceed the
4.5A maximum current limit. Once the
switch current hits
7.2A over
current limit, the LT8302 also initiates a new
soft-start cycle. Under either condition, the new soft-start
cycle throttles back both the switch current limit and switch
frequency. The output short-circuit protection prevents the
switch current from running away and limits the average
output diode current.
LT8302
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8302fc
For more information www.linear.com/LT8302
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Design Example
Use the following design example as a guide to designing
applications for the LT8302. The design example involves
designing a 5V output with a 1.5A load current and an
input range from 8V to 32V.
V
IN(MIN)
= 8V, V
IN(NOM)
= 12V, V
IN(MAX)
= 32V,
V
OUT
= 5V, I
OUT
= 1.5A
Step 1: Select the transformer turns ratio.
N
PS
<
65V – V
IN(MAX)
– V
LEAKAGE
V
OUT
+ V
F
V
LEAKAGE
= Margin for transformer leakage spike = 15V
V
F
= Output diode forward voltage = ~0.3V
Example:
N
PS
<
65V – 32V – 15V
5V + 0.3V
= 3.4
The choice of transformer turns ratio is critical in determin-
ing output current capability of
the converter. Table2 shows
the switch voltage stress and output current capability at
different transformer turns ratio.
Table 2. Switch Voltage Stress and Output Current Capability vs
Turns Ratio
NPS
V
SW(MAX)
at
V
IN(MAX)
(V)
I
OUT(MAX)
at
V
IN(MIN)
(A) DUTY CYCLE (%)
1:1 37.3 0.92 14-40
2:1 42.6 1.31 25-57
3:1 47.9 1.53 33-67
Clearly, only N
PS
= 3 can meet the 1.5A output current
requirement, so N
PS
= 3 is chosen as the turns ratio in
this example.
Step 2: Determine the primary inductance.
Primary inductance for the transformer must be set above
a minimum value to satisfy the minimum switch-off and
switch-on time requirements:
L
PRI
≥
t
OFF(MIN)
• N
PS
• V
OUT
+ V
F
( )
I
SW(MIN)
L
PRI
≥
t
ON(MIN)
• V
IN(MAX)
I
SW(MIN)
t
OFF(MIN)
= 350ns
t
ON(MIN)
= 160ns
I
SW(MIN)
= 0.87A
Example:
L
PRI
≥
350ns • 3 • 5V + 0.3V
( )
0.87A
= 6.4µH
L
PRI
≥
160ns • 32V
0.87A
= 5.9µH
Most transformers specify primary inductance with a toler-
ance of ±20%. With other
component tolerance considered,
choose a transformer with its primary inductance 40% to
60% larger than the minimum values calculated above.
L
PRI
= 9µH is then chosen in this example.
Once the primary inductance has been determined, the
maximum load switching frequency can be calculated as:
f
SW
=
1
t
ON
+ t
OFF
=
1
L
PRI
• I
SW
V
IN
+
L
PRI
• I
SW
N
PS
• V
OUT
+ V
F
( )
I
SW
=
V
OUT
• I
OUT
• 2
η • V
IN
• D
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LT8302ES8E#PBF

Mfr. #:
Buy LT8302ES8E#PBF
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 42VIN Micropower No-Opto Isolated Flyback Converter with 65V/4.5A Switch
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