NB3L208K
www.onsemi.com
7
Figure 3. Typical Phase Noise Plot at f
carrier
= 156.25 MHz at an Operating Voltage of 3.3 V, Room Temperature
The above phase noise data was captured using Agilent
E5052A/B. The data displays the input phase noise and
output phase noise used to calculate the additive phase jitter
at a specified integration range. The additive RMS phase
jitter contributed by the device (integrated between 12 kHz
and 20 MHz) is 45.7 fs.
The additive RMS phase jitter performance of the fanout
buffer is highly dependent on the phase noise of the input
source.
To obtain the most accurate additive phase noise
measurement, it is vital that the source phase noise be
notably lower than that of the DUT. If the phase noise of the
source is similar or greater than the device under test output,
the source noise will dominate the additive phase jitter
calculation and lead to an artificially low result for the
additive phase noise measurement within the integration
range.
Additive RMS phase jitter + RMS phase jitter of output
2
* RMS phase jitter of input
2
Ǹ
45.7 fs + 73.7 fs
2
* 57.8 fs
2
Ǹ
