AD7191
Rev. A | Page 9 of 20
Pin No. Mnemonic Description
20 AV
DD
Analog Supply Voltage, 3 V to 5.25 V. AV
DD
is independent of DV
DD
. Therefore, DV
DD
can be operated at 3 V
with AV
DD
at 5 V or vice versa.
21 DV
DD
Digital Supply Voltage, 2.7 V to 5.25 V. DV
DD
is independent of AV
DD
. Therefore, AV
DD
can be operated at 3 V
with DV
DD
at 5 V or vice versa.
22 ODR1 Output Data Rate, Digital Input Pin. This pin is used with ODR2 to select the output data rate. See Table 5.
23
DOUT/RDY
Serial Data Output/Data Ready Output. DOUT/RDYserves a dual purpose. It functions as a serial data
output pin to access the data conversions from the ADC. In addition, DOUT/RDY
operates as a data ready
pin, going low to indicate the completion of a conversion. If the data is not read after the conversion, the
pin goes high before the next update occurs. The serial interface is reset each time that a conversion is
available. The DOUT/RDY
falling edge can be used as an interrupt to a processor, indicating that valid data
is available. With an external serial clock, the data can be read using the DOUT/RDY
pin. Data is placed on
the DOUT/RDY
pin on the SCLK falling edge and is valid on the SCLK rising edge.
24 ODR2 Output Data Rate, Digital Input Pin. This pin is used with ODR1 to select the output data rate. See Table 5.
AD7191
Rev. A | Page 10 of 20
TYPICAL PERFORMANCE CHARACTERISTICS
8,388,270
8,388,275
8,388,280
8,388,285
8,388,290
8,388,295
0 200 400 600 800 1000
SAMPLE
CODE
08163-005
Figure 5. Noise (V
REF
= AV
DD
, Output Data Rate = 10 Hz,
Gain = 128)
0
50
100
150
8,388,275
8,388,279
8,388,283
8,388,287
8,388,291
8,388,295
CODE
OCCURRENCE
08163-006
Figure 6. Noise Distribution Histogram
(V
REF
= AV
DD
, Output Data Rate = 10 Hz, Gain = 128)
8,388,240
8,388,250
8,388,260
8,388,270
8,388,280
8,388,290
8,388,300
8,388,310
8,388,320
8,388,330
0 200 400 600 800 1000
SAMPLE
CODE
08163-007
Figure 7. Noise (V
REF
= AV
DD
, Output Data Rate = 120 Hz,
Gain = 128)
0
10
20
30
40
50
8,388,240
8,388,260
8,388,280
8,388,300
8,388,320
8,388,340
CODE
O
CCURRENCE
08163-008
Figure 8. Noise Distribution Histogram
(V
REF
= AV
DD
, Output Data Rate = 120 Hz, Gain = 128)
AD7191
Rev. A | Page 11 of 20
8,388,795
8,388,800
8,388,805
8,388,810
8,388,815
8,388,820
8,388,825
0 200 400 600 800 1000
SAMPLE
CODE
08163-009
Figure 9. Noise (V
REF
= AV
DD
, Output Data Rate = 120 Hz,
Gain = 1)
0
50
100
150
8,388,800
8,388,805
8,388,810
8,388,815
8,388,820
8,388,825
CODE
OCCURRENCE
08163-010
Figure 10. Noise Distribution Histogram
(V
REF
= AV
DD
, Output Data Rate = 120 Hz, Gain = 1)
–2
–1
0
1
2
3
4
5
432101234
V
IN
(V)
INL (PPM OF FSR)
08163-111
Figure 11. INL (Gain = 1)
–20
–15
–10
–5
0
5
10
15
20
–0.03 –0.02 –0.01 0 0.01 0.02 0.03
V
IN
(V)
INL (PPM OF FSR)
08163-112
Figure 12. INL (Gain = 128)

AD7191BRUZ

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Analog to Digital Converters - ADC 2CH Ultra Low Noise 24Bit
Lifecycle:
New from this manufacturer.
Delivery:
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