74ABT657_3 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 03 — 15 March 2010 4 of 17
NXP Semiconductors
74ABT657
Octal transceiver with parity generator/checker; 3-state
5. Pinning information
5.1 Pinning
5.2 Pin description
Fig 4. Pin configuration
74ABT657
T/R OE
A0 B0
A1 B1
A2 B2
A3 B3
A4 GND
V
CC
GND
A5 B4
A6 B5
A7 B6
ODD/EVEN B7
ERROR PARITY
001aae825
1
2
3
4
5
6
7
8
9
10
11
12
14
13
16
15
18
17
20
19
22
21
24
23
Table 2. Pin description
Symbol Pin Description
T/
R 1 transmit/receive input
A0 to A7 2, 3, 4, 5, 6, 8, 9, 10 A port input/3-state output
V
CC
7 positive supply voltage
ODD/
EVEN 11 parity select input
ERROR 12 error output in receive mode
PARITY 13 parity output in transmit mode/input in
receive mode
B0 to B7 23, 22, 21, 20, 17, 16, 15, 14 B port input/3-state output
GND 18, 19 ground (0 V)
OE 24 output enable input (active LOW)
74ABT657_3 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 03 — 15 March 2010 5 of 17
NXP Semiconductors
74ABT657
Octal transceiver with parity generator/checker; 3-state
6. Functional description
6.1 Function selection
[1] H = HIGH voltage level;
L = LOW voltage level;
X = don’t care;
Z = high-impedance OFF-state.
Table 3. Function selection
[1]
Number of
inputs HIGH
Inputs Data I/O Output
OE T/R ODD/EVEN PARITY ERROR Mode
0, 2, 4, 6 and 8
(even)
L H H H Z transmit
L H L L Z transmit
L L H H H receive
L L H L L receive
L L L H L receive
L L L L H receive
1, 3, 5 and 7
(odd)
L H H L Z transmit
L H L H Z transmit
L L H H L receive
L L H L H receive
L L L H H receive
L L L L L receive
Don’t care H X X Z Z 3-state
74ABT657_3 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 03 — 15 March 2010 6 of 17
NXP Semiconductors
74ABT657
Octal transceiver with parity generator/checker; 3-state
7. Limiting values
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150 °C.
8. Recommended operating conditions
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
V
CC
supply voltage 0.5 +7.0 V
V
I
input voltage
[1]
1.2 +7.0 V
V
O
output voltage output in OFF-state or HIGH-state
[1]
0.5 +5.5 V
I
IK
input clamping current V
I
< 0 V 18 - mA
I
OK
output clamping current V
O
< 0 V 50 - mA
I
O
output current output in LOW-state - 128 mA
T
j
junction temperature
[2]
- 150 °C
T
stg
storage temperature 65 +150 °C
Table 5. Recommended operating conditions
Symbol Parameter Conditions Min Typ Max Unit
V
CC
supply voltage 4.5 - 5.5 V
V
I
input voltage 0 - V
CC
V
V
IH
HIGH-level input voltage 2.0 - - V
V
IL
LOW-level input voltage - - 0.8 V
I
OH
HIGH-level output current 32--mA
I
OL
LOW-level output current - - 64 mA
t/V input transition rise and fall rate 0 - 5 ns/V
T
amb
ambient temperature in free air 40 - +85 °C

74ABT657PW,112

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
IC TXRX NON-INVERT 5.5V 24TSSOP
Lifecycle:
New from this manufacturer.
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