LTC2952
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PIN FUNCTIONS
EN (Pin 14/Pin 11): DC/DC Enable Output. This pin is a
high voltage open-drain pull-down used to control system
power. EN pin goes high impedance after an initial turn-on
command (via either the digital on or a valid pushbutton
on—refer to the Applications Information section). EN pin
pulls low at the end of a valid power-down sequence, or
when KILL pin is driven low anytime after a valid power-up
sequence.This pin can connect directly to a DC/DC converter
shutdown pin that provides an internal pull-up. Otherwise
a pull-up resistor to an external supply is required. The
voltage can not exceed the absolute maximum voltage of
both the pin and the circuit it is driving.
Exposed Pad (Pin 21, QFN Package): The exposed pad
may be left open or connected to device ground.
G1 (Pin 19/Pin 16): Primary P-Channel MOSFET Gate Drive
Output. When the primary ideal diode function is enabled
and in regulation, the ideal diode controller drives this pin
to maintain a forward voltage (V
FR
) of 20mV between the
V1 and VS pins. When another power source is driving
the VS pin, causing the voltage level at the VS pin to be
greater than the voltage level at the V1 pin or when the
primary ideal diode driver is disabled via the mode select
input pins, this pin pulls up to the MAX (V1, VS) voltage,
turning off the primary P-channel power switch. Leave this
pin open when primary ideal diode function is not used.
G1STAT (Pin 20/Pin 17): Open-Drain Primary Ideal Diode
Status Output. When the primary P-channel power switch
is off, the G1STAT pin will go from an open state to a strong
pull-down. This pin can be used to signal the state of the
primary ideal diode PowerPath to a microcontroller. Leave
this pin open or tied to GND when unused.
G2 (Pin 15/Pin 12): Secondary P-Channel MOSFET Gate
Drive Output. When the secondary ideal diode function
is enabled and in regulation, the ideal diode controller
drives this pin to maintain a forward voltage (V
FR
) of 20mV
between the V2 and VS pins. When another power source
is driving the VS pin, causing the voltage level at the VS
pin to be greater than the voltage level at the V2 pin or
when the secondary ideal diode driver is disabled via the
mode select input pins, this pin pulls up to the MAX (V2,
VS) voltage, turning off the secondary P-channel power
switch. Leave this pin open when secondary ideal diode
function is not used.
GND (Pin 12/Pin 9): Device Ground.
INT (Pin 13/Pin 10): Interrupt Output. This pin is an
open-drain pull-down pin used to signal the system that
a power shutdown is imminent. The INT pin asserts low
26ms after the initial falling edge of the pushbutton off
event and during the power-down sequence. Leave this
pin open or tied to GND if interrupt signal is unused.
KILL (Pin 3/Pin 20): System Power Shutdown Input. Set-
ting this pin low asserts the EN pin low. In modes where
M1 is above threshold, setting this pin low also shuts
off the ideal diodes. During system turn-on, input to this
pin is ignored until 400ms (t
KILL,ON
BLANK
) after the EN
pin first becomes high impedance. This pin has an accu-
rate 0.5V falling threshold and can be used as a voltage
monitor input.
M1 (Pin 2/Pin 19): Mode Select Input 1. Input to an ac-
curate comparator with 0.5V falling threshold and 15mV
hysteresis. Has a 3μA internal pull-up to an internal supply
(4V). Together with M2 determines the ideal PowerPath and
on/off control behavior of the part. Refer to the Operation
and Applications Information sections for configurations
based on the voltage levels at M1 and M2.
M2 (Pin 1/Pin 18): Mode Select Input 2. High imped-
ance input to an accurate comparator with 0.5V falling
threshold and 15mV hysteresis. When M1 is low, M2
controls whether the primary (G1) ideal diode function
is enabled. When M1 is high, M2 acts as a digital on/off
control input: A rising edge on this pin is interpreted as
a turn-on command and a falling edge is interpreted as
a turn-off command. Refer to the Operation and Applica-
tions Information sections for configurations based on
the voltage levels at M1 and M2.
OFFT (Pin 11/Pin 8): Off Timing Input. Attach 110pF
of external capacitance (C
OFFT
) to GND for each
additional millisecond of turn-off debounce time
beyond the internally set 26ms. Leave open if additional
debounce time is not needed.
ONT (Pin 10/Pin 7): On Timing Input. Attach 110pF of
external capacitance (C
ONT
) to GND for each additional
millisecond of turn-on debounce time beyond the inter-
nally set 26ms. Leave open if additional debounce time
is not needed.
(TSSOP/QFN)
LTC2952
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PB (Pin 7/Pin 4): Pushbutton Input. Input to a comparator
with 0.775V falling threshold and 25mV hysteresis. PB has
a 10μA internal pull-up to an internal supply (4V). This
pin provides on/off power supply control via the EN pin,
which is typically connected to an external DC/DC con-
verter. Setting the PB pin low for a time determined by the
ONT timing capacitor toggles the EN pin high impedance.
Letting this pin toggle high and then setting this pin low
again for 26ms asserts INT low. After the INT pin asserts
low, if the PB pin is still held low for a time determined by
the OFFT timing capacitor, the process of turning off the
system power begins. At the end of the turn-off process,
the EN pin is set low. Leave this pin open if pushbutton
function is not used.
PFI (Pin 5/Pin 2): Power Fail Input. High impedance input
to an accurate comparator with a 0.5V falling threshold
and 15mV hysteresis. This pin controls the state of the
PFO output pin. Tie to device GND if power fail monitoring
function is not used.
PFO (Pin 9/Pin 6): Power Fail Output. This pin is an open-
drain pull-down which pulls low when the PFI input is
below 0.5V. Leave this pin open or tied to GND if power
fail monitoring function is not used.
RST (Pin 8/Pin 5): Reset Output. This pin is an open-drain
pull-down. Pulls low when VM input is below 0.5V and
held low for 200ms after VM input is above 0.5V. Also
pulls low for 200ms when the watchdog timer (1.6s) is
allowed to time out. Leave this pin open or tied to GND if
voltage monitoring function is not used.
V1 (Pin 18/Pin 15): Primary Input Supply Voltage: 2.7V
to 28V. Supplies power to the internal circuitry and is the
anode input of the primary ideal diode driver (the cathode
input to the ideal diode drivers is the VS pin). A battery or
other primary power source usually provides power to this
input. Minimize the capacitance on this pin in applications
where the pin can be high impedance (disconnected or
inherent high source impedance). Otherwise, an optional
bypass capacitor to ground in the range of 0.1μF to 10μF
can be used.
V2 (Pin 16/Pin 13): Secondary Input Supply Voltage:
2.7V to 28V. Supplies power to the internal circuitry and
is the anode input of the secondary ideal diode driver (the
cathode input to the ideal diode drivers is the VS pin). A
secondary power source such as a wall adapter, usually
provides power to this input. Minimize the capacitance on
this pin in applications where the pin can be high imped-
ance (disconnected or inherent high source impedance).
Otherwise, an optional bypass capacitor to ground in the
range of 0.1μF to 10μF can be used.
VM (Pin 4/Pin 1): Voltage Monitor Input. High impedance
input to an accurate comparator with a 0.5V threshold.
Together with the WDE pin controls the state of the RST
output pin. Tie to device GND if voltage monitoring func-
tion is not used.
VS (Pin 17/Pin 14): Power Sense Input. This pin supplies
power to the internal circuitry and is the cathode input to
the ideal diode drivers (the anode inputs to the ideal diode
drivers are the V1 and V2 pins). Bypass this pin to ground
with one or more capacitors of at least 0.1μF.
WDE (Pin 6/Pin 3): Watchdog/Extend Input. A three-state
input pin. A rising or falling edge must occur on this pin
within a 1.6s watchdog timeout period (while the RST
output is high impedance), to prevent the RST pin from
going low. The watchdog function of this pin is disabled
when both of the ideal diode drivers are disabled in
certain PowerPath configurations (refer to the Applica-
tion Information section). During a shutdown process: a
rising or falling edge on this WDE pin within the 400ms
t
KILL,OFF WAIT
period extends the waiting period another
400ms before the EN line is set low. This extend process
can be repeated indefinitely in order to provide as much
time as possible for the microprocessor to do its house-
keeping functions before a power shutdown. Leave open
or drive in Hi-Z state with a three-state buffer to disable
watchdog or extend function or both.
PIN FUNCTIONS
(TSSOP/QFN)
LTC2952
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BLOCK DIAGRAM
CP4
0.5V
+
V2 VS
V2
G1G2
GATE
STAT
ON/OFF
V1
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IDEAL DIODE DRIVER 1
GATE
IDEAL DIODE DRIVER 2
LINEAR GATE
DRIVER AND
VOLTAGE CLAMP
ANALOG
CONTROLLER
INTERNAL
ENABLE
INTERNAL
ENABLE
G1STAT
EN
INT
SECONDARY SUPPLY TO LOAD PRIMARY SUPPLY
A1
V
CC
V
CC
VSV
IN
V
IN
VS
VS V1
A2
ANALOG
CONTROLLER
LINEAR GATE
DRIVER AND
VOLTAGE CLAMP
OFFT
ONT
PUSHBUTTON
DETECT
LOGIC
LDO/BAND GAP
REF
0.5V 0.775V
M2
CP5
0.5V
3μA
10μA
+
M1
GND
CP3
CP6
0.5V
0.775V
+
KILL
PB
+
+
V
CC
+
PUSH-BUTTON
OSCILLATOR
200ms RST DELAY/
1.6s WATCHDOG TIMER
PFI
PFO
MONITORS
CP2
0.5V
WDE
THREE-STATE/
EDGE DETECTOR
+
VM
CP1
0.5V
+
RST
200μS
FILTER

LTC2952IF#TRPBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Power Management Specialized - PMIC Push Button Power Path Controller with System Monitoring
Lifecycle:
New from this manufacturer.
Delivery:
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