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TFA9881UK/N1,023

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TFA9881 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 3 — 23 April 2013 16 of 32
NXP Semiconductors
TFA9881
3.4 W PDM input class-D audio amplifier
12.2 AC characteristics
[1] R
L
= load resistance; L
L
= load inductance.
[2] Inversely proportional to f
clk
.
Table 17. AC characteristics
All parameters are guaranteed for V
TEST
= V
DDP
= 3.6 V; V
DDD
=1.8 V; R
L
= 4
[1]
; L
L
= 20
H
[1]
; f
i
= 1 kHz; f
clk
= 6.144 MHz;
T
amb
= 25
C; default settings, unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
Output power
P
o(RMS)
RMS output power THD + N = 1 %
V
DDP
= 3.6 V, f
i
= 100 Hz - 1.4 - W
V
DDP
= 5.0 V, f
i
= 100 Hz - 2.7 - W
THD + N = 1 %; R
L
= 8 ; L
L
= 44 H
V
DDP
= 3.6 V, f
i
= 100 Hz - 0.75 - W
V
DDP
= 5.0 V, f
i
= 100 Hz - 1.45 - W
THD + N = 10 %
V
DDP
= 3.6 V, f
i
= 100 Hz - 1.75 - W
V
DDP
= 5.0 V, f
i
= 100 Hz - 3.4 - W
THD + N = 10 %; R
L
= 8 ; L
L
= 44 H
V
DDP
= 3.6 V, f
i
= 100 Hz - 0.95 - W
V
DDP
= 5.0 V, f
i
= 100 Hz - 1.85 - W
Performance
po
output power efficiency P
o(RMS)
= 1.4 W - 90 - %
THD+N total harmonic distortion-plus-noise P
o(RMS)
= 100 mW - 0.02 0.1 %
V
n(o)
output noise voltage A-weighted - 24 - V
S/N signal-to-noise ratio V
DDP
=5 V; V
o
= 3.4 V (RMS); A-weighted - 103 - dB
PSRR power supply rejection ratio V
ripple
=200 mV; f
ripple
= 217 Hz - 85 - dB
V
oM
peak output voltage At 6 dBFS (peak) digital input
gain = 3 dB; V
DDP
= 3.6 V
R
L
=4 ; L
L
= 20 H
-2.3- V
gain = 0 dB; V
DDP
= 3.6 V
R
L
=4 ; L
L
= 20 H
3.1 3.3 3.5 V
gain = +3 dB; V
DDP
= 5.0 V
R
L
=8 ; L
L
= 44 H
-4.7- V
Power-up, power-down and propagation times
t
d(on)
turn-on delay time
[2]
-- 2ms
t
d(off)
turn-off delay time
[2]
-- 5s
t
PD
propagation delay
[2]
-- 55s
TFA9881 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 3 — 23 April 2013 17 of 32
NXP Semiconductors
TFA9881
3.4 W PDM input class-D audio amplifier
12.3 PDM timing characteristics
[1] R
L
= load resistance; L
L
= load inductance.
Table 18. PDM timing characteristics
All parameters are guaranteed for V
TEST
= V
DDP
= 3.6 V; V
DDD
=1.8 V; R
L
= 4
[1]
; L
L
= 20
H
[1]
; f
i
= 1 kHz; f
clk
= 6.144 MHz;
T
amb
= 25
C; default settings, unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
f
clk
clock frequency 2 - 8 MHz
clk
clock duty cycle 40 - 60 %
t
h
hold time after clock HIGH 7 - - ns
after clock LOW 7 - - ns
t
su
set-up time after clock HIGH 10 - - ns
after clock LOW 10 - - ns
Fig 9. PDM timing
t
su(CLKH)
t
h(CLKH)
t
su(CLKL)
t
h(CLKL)
CLK
DATA
010aaa711
TFA9881 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 3 — 23 April 2013 18 of 32
NXP Semiconductors
TFA9881
3.4 W PDM input class-D audio amplifier
13. Application information
13.1 ElectroMagnetic Compatibility (EMC)
EMC standards define to what degree a (sub)system is susceptible to externally imposed
electromagnetic influences and to what degree a (sub)system is responsible for emitting
electromagnetic signals, when in Standby mode or Operating mode.
EMC immunity and emission values are normally measured over a frequency range from
180 kHz up to 3 GHz.
13.1.1 Immunity
A major reason why amplifier devices pick up high frequency signals, and (after detection)
manifest these in the device's audio band, is the presence of analog circuits inside the
device or in the (sub)system.
The TFA9881 has digital inputs and digital outputs. Comparative tests on a
TFA9881-based (sub)system show that the impact of externally imposed electromagnetic
signals on the device is negligible in both Standby and Operating modes.
13.1.2 Emissions
Since the TFA9881 is a class-D amplifier with digitally switched outputs in a BTL
configuration, it can potentially generate emissions due to the steep edges on the
amplifier outputs. External components can be used to suppress these emissions.
However, the TFA9881 features built-in slope control to suppress such emissions by
reducing the slew rate of the BTL output signals. By reducing the slew rate, the emissions
are reduced by 10 dB when compared with full-speed operation.
13.2 Supply decoupling and filtering
A ceramic decoupling capacitor of between 4.7 F and 10 F should be placed close to
the TFA9881 for decoupling the V
DDP
supply. This minimizes the size of the
high-frequency current loop, thereby optimizing EMC performance. The TEST bump can
be used to route the V
DDP
bump connection (without using a PCB via).
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TFA9881UK/N1,023

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Buy TFA9881UK/N1,023
Manufacturer:
NXP Semiconductors
Description:
IC AMP AUDIO CLASSD 3.4W 9WLCSP
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