TFA9881 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 3 — 23 April 2013 7 of 32
NXP Semiconductors
TFA9881
3.4 W PDM input class-D audio amplifier
8.4 Control settings
Control settings are not needed if the default values are adequate.
8.4.1 Silence pattern recognition
The TFA9881 can detect control settings on the PDM input by means of silence pattern
recognition. A silence pattern has the following properties:
• All audio bytes have the same value
• Each audio byte must contain four zeros and four ones
The ten silence patterns recognized by the TFA9881 are listed in the first column of
Table 7
. The second column contains the related audio bytes that are generated when the
silence patterns are phase shifted by 1, 2, 3, 4, 5, 6 and 7 bits.
The TFA9881 reacts as follows on receiving a silence pattern (see Table 8
):
• After receiving 32 consecutive silence pattern audio bytes, the TFA9881 sets the
outputs floating.
• After receiving 128 consecutive silence pattern audio bytes, the TFA9881 activates
the appropriate control setting (see column three of Table 7
).
Remark: Only the control settings associated with silence patterns containing audio bytes
0xD2, 0xD4, 0xD8, 0xE1, 0xE2, 0xE4 and 0xAA can be set during power-up (before the
power-up delay time, t
d(on)
, has expired). After power-up, only silence patterns containing
bytes 0x66 and 0xAC will be recognized. All other silence patterns are ignored.
All control settings can be activated when:
• control silence patterns are transmitted after the TFA9881 has been switched to
Power-down mode on receipt of a power-down silence pattern (at least 128
consecutive 0xAC bytes)
• control silence patterns are transmitted after the clock input has stopped and then
started again (power-up)
If a silence pattern containing more than 128 consecutive silence pattern audio bytes is
received during power-up, the TFA9881 outputs will remain floating until a different audio
byte is received. It will then switch to Operating mode. Once the TFA9881 has powered
up, only ‘mute’ (0x66) and ‘power-down’ (0xAC) control patterns are recognized.
All registers are reset to their default values if silence pattern 0xAA is received or the V
DDD
supply is removed.
Table 7. Silence patterns
Byte Related bytes
[1]
Control settings
0xD1 0xE8/74/3A/1D/8E/47/A3 reserved for test purposes
0xD2 0x69/B4/5A/2D/96/4B/A5 clip control on; see Section 8.4.2
0xD4 0x6A/35/9A/4D/A6/53/A9 gain = 3dB (V
DDP
= 2.5 V); see Section 8.4.3
0xD8 0x6C/36/1B/8D/C6/63/B1 gain = +3 dB (V
DDP
= 5.0 V); see Section 8.4.3
0xE1 0xF0/78/3C/1E/0F/87/C3 slope low (EMC); see Section 8.4.4
0xE2 0x71/B8/5C/2E/17/8B/C5 Dynamic Power Stage Activation (DPSA) off;
see Section 8.4.5
