Software POR: The soft power-on reset (POR) com-
mand is 54h. The master sends a START followed by an
address byte containing the DS75LV bus address. The
R/W bit must be a 0. The DS75LV responds with an ACK.
If the next byte is a 0x54, the DS75LV resets as if power
had been cycled. No ACK is sent by the IC after the POR
command is received.
Reading from the DS75LV: When reading from the
DS75LV, if the pointer was already pointed to the desired
register during a previous transaction, the read can be
performed immediately without changing the pointer setting.
In this case the master sends a START followed by an
address byte containing the DS75LV bus address. The
R/W bit must be a 1, which tells the DS75LV that a read
is being performed. After the DS75LV sends an ACK in
response to the address byte, the DS75LV begins trans-
mitting the requested data on the next clock cycle. When
reading from the configuration register, the DS75LV
transmits one byte of data, after which the master must
respond with a NACK followed by a STOP (see Figure
9e). For two-byte reads (i.e., from the Temperature, T
OS
or T
HYST
register), the DS75LV transmits two bytes
of data, and the master must respond to the first data
byte with an ACK and to the second byte with a NACK
followed by a STOP (see Figure 9a). If only the most
significant byte of data is needed, the master can issue
a NACK followed by a STOP after reading the first data
byte in which case the transaction is the same as for a
read from the configuration register.
If the pointer is not already pointing to the desired register,
the pointer must first be updated as shown in
Figure 9d
,
which shows a pointer update followed by a single-byte
read. The value of the R/W bit in the initial address byte
is a 0 (“write”) since the master is going to write a pointer
byte to the DS75LV. After the DS75LV responds to the
address byte with an ACK, the master sends a pointer byte
that corresponds to the desired register. The master must
then perform a repeated start followed by a standard one
or two byte read sequence (with R/W =1) as described in
the previous paragraph.
Bus Timeout: The DS75LV has a bus timeout feature
that prevents communication errors from leaving the IC
in a state where SDA is held low disrupting other devices
on the bus. If the DS75LV holds the SDA line low for a
period of t
TIMEOUT
, its bus interface automatically resets
and release the SDA line. Bus communication frequency
must be fast enough to prevent a reset during normal
operation. The bus timeout feature only applies to when
the DS75LV is holding SDA low. Other devices can hold
SDA low for an undefined period without causing the
interface to reset.
DS75LV Digital Thermometer and Thermostat
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