Rev. Issue Date Issuer Description Page #
L 9/12/2013 V. Chaudhry
1. Updated pins 12, 20, 33 and 42 in pinouts and pin
descriptions.
Various
M 12/9/2013 R. Wade
1. Extensive overhaul of Electrical tables to more closely align
with Freescale published specifications.
2. Updated electrical tables with characterization data.
3. Clarified SMBus registers for Slew Rate Controls
4. Moved electrical tables in front of SMBus for consistency
with other data sheets.
5. Updated Thermal Data and added test loads for clarity.
6. Updated front page text
7. Minor updates to pin names (mainly power and ground) for
consistency and clarity
8. Move to Final
Various
N
6/2/2014
R. Wade 1. Corrected pin description for pin 44.
3
P
8/10/2015
R. Wade
1. Updated SMBus operating frequency from 100KHz minimum
to 400KHz maximum.
5
Q
5/11/2016
RDW
1. Correct PCIeT_LRn and PCIeC_LRn to be PCIeT_Ln and
the part and to correct the pin description accordingly. The test
loads for the device are correct.
2. Update block diagram PCIe pin names to be consistent.
1-3
R
11/22/2016
RDW
1. Undo Revision Q
2. PCIe outputs have integrated terminations for 100ohm
differential Zo.
3. Update Test Loads
4. Update Features/Benefits
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