7
LTC1875
1875f
BLOCK DIAGRA
W
+
+
+
+
+
EA
I
TH
BURST
SLEEP
EN
SLEEP
0.8V
0.86V
0.6V
V
FB
SV
IN
FREQ
SHIFT
SLOPE
COMP
OSC
VCO
AND
OSC
X
BURST DEFEAT
Y
Y = “0” ONLY WHEN X IS A CONSTANT “1”
RUN/SS
SYNC/MODE
PLL_LPF
S
R
RS LATCH
Q
0.45V
Q
SWITCHING
LOGIC
AND
BLANKING
CIRCUIT
THERMAL
SHUTDOWN
ANTI-
SHOOT-
THROUGH
OVDET
OV
+
RCMP
+
0.74V
UVDET
PGOOD
SHUTDOWN
SGND
SOFT-START
0.8V REF
SV
IN
+
I
COMP
2.9
PGND
7, 10
6, 11
8, 9
TOP
MOSFET
BOTTOM
MOSFET
1875 FD
SWN
PV
IN
SV
IN
0.8V
14
1
4
16
15
3
2
13
5, 12
SWP
8
LTC1875
1875f
OPERATIO
U
Main Control Loop
The LTC1875 uses a constant frequency, current mode
step-down architecture. Both the top MOSFET and syn-
chronous bottom MOSFET switches are internal. During
normal operation, the internal top power MOSFET is
turned on each cycle when the oscillator sets the RS latch,
and turned off when the current comparator, I
COMP
, resets
the RS latch. The peak inductor current at which I
COMP
turns the top MOSFET off is controlled by the voltage on
the I
TH
pin, which is the output of error amplifier EA. When
the load current increases, it causes a slight decrease in
the feedback voltage, V
FB
, relative to the 0.8V internal
reference, which, in turn, causes the I
TH
voltage to in-
crease until the average inductor current matches the new
load current. While the top MOSFET is off, the bottom
MOSFET is turned on until either the inductor current
starts to reverse direction or the next clock cycle begins.
Comparator OVDET guards against transient overshoots
>7.5% by turning the main switch off and keeping it off
until the fault is removed.
Burst Mode Operation
The LTC1875 is capable of Burst Mode operation in which
the internal power MOSFETs operate intermittently based
on load demand. To enable Burst Mode operation, simply
tie the SYNC/MODE pin to SV
IN
or connect it to a logic high
(V
SYNC/MODE
> 1.5V). To disable Burst Mode operation
and enable PWM pulse skipping mode, connect the SYNC/
MODE pin to SGND. In this mode, the efficiency is lower at
light loads but becomes comparable to Burst Mode opera-
tion when the output load exceeds 100mA. The advantage
of pulse skipping mode is lower output ripple.
When the converter is in Burst Mode operation, the peak
current of the inductor is set to approximately 400mA,
even though the voltage at the I
TH
pin indicates a lower
value. The voltage at the I
TH
pin drops when the inductor’s
average current is greater than the load requirement. As
the I
TH
voltage drops below approximately 0.45V, the
BURST comparator trips, turning off both power MOSFETs.
The I
TH
pin is then disconnected from the output of the EA
amplifier and held 0.65V above ground.
In sleep mode, both power MOSFETs are held off and the
internal circuitry is partially turned off, reducing the quies-
cent current to 15µA. The load current is now being
supplied from the output capacitor. When the output
voltage drops, the I
TH
pin reconnects to the output of the
EA amplifier and the top MOSFET is again turned on and
this process repeats.
Soft-Start/Run Function
The RUN/SS pin provides a soft-start function and a
means to shut down the LTC1875. Soft-start reduces the
input current surge by gradually increasing the regulator’s
maximum output current. This pin can also be used for
power supply sequencing.
Pulling the RUN/SS pin below 0.7V shuts down the
LTC1875, which then draws <1µA current from the sup-
ply. This pin can be driven directly from logic circuits as
shown in Figure 1. It is recommended that this pin is driven
to V
IN
during normal operation. Note that there is no
current flowing out of this pin. Soft-start action is accom-
plished by connecting an external RC network to the RUN/
SS pin as shown in Figure 1. The LTC1875 actively pulls
the RUN/SS pin to ground under low input supply voltage
conditions.
(Refer to Block Diagram)
3.3V OR 5V
V
IN
RUN/SS
D1*
0.32V
R
SS
C
SS
*ZETEX BAT54
1875 F01
Figure 1. RUN/SS Pin Interfacing
9
LTC1875
1875f
Power Good Indicator
The power good function monitors the output voltage in all
modes of operation. Its open-drain output is pulled low
when the output voltage is not within ±7.5% of its nomi-
nally regulated voltage. The feedback voltage is filtered
before it is fed to a power good window comparator in
order to prevent false tripping of the power good signal
during fast transients. The window comparator monitors
the output voltage even in Burst Mode operation. In
shutdown mode, open drain is actively pulled low to
indicate that the output voltage is invalid.
Short-Circuit Protection
When the output is shorted to ground, the frequency of
the oscillator is reduced to about 80kHz, 1/7 the nominal
frequency. This frequency foldback ensures that the in-
ductor current has more time to decay, thereby preventing
runaway. The oscillator’s frequency will progressively
increase to 550kHz (or to the synchronized frequency)
when V
FB
rises above 0.3V.
Frequency Synchronization
The LTC1875 can be synchronized to an external clock
source connected to the SYNC/MODE pin. The turn-on of
the top MOSFET is synchronized to the rising edge of the
external clock.
When the LTC1875 is clocked by an external source, Burst
Mode operation is disabled. In this synchronized mode,
when the output load current is very low, current compara-
tor, I
COMP
, may remain tripped for several cycles and force
the main switch to stay off for the same number of cycles.
Increasing the output load slightly allows constant fre-
quency PWM operation to resume.
Frequency synchronization is inhibited when the feedback
voltage V
FB
is below 0.6V. This prevents the external clock
from interfering with the frequency foldback for short-
circuit protection.
Low Dropout Operation
When the input supply voltage decreases toward the
output voltage in a buck regulator, the duty cycle in-
creases toward the maximum on-time. Further reduction
of the supply voltage forces the main switch to remain on
for more than one cycle until it reaches 100% duty cycle.
The output voltage will then be determined by the input
voltage minus the voltage drop across the top MOSFET
and the inductor.
Low Supply Operation
The LTC1875 is designed to operate down to an input
supply voltage of 2.65V although the maximum allowable
output current is reduced at this low voltage. Figure 2
shows the reduction in the maximum output current as a
function of input voltage.
Another important detail to remember is that at low input
supply voltages, the R
DS(ON)
of the P-channel switch
increases. Therefore, the user should calculate the power
dissipation when the LTC1875 is used at 100% duty cycle
with low supply voltage (see Thermal Considerations in
the Applications Information section).
INPUT VOLTAGE (V)
2.5
0
MAX OUTPUT CURRENT (mA)
500
1000
1500
2000
3.5 4.5 5.5 6.5
1875 F02
7.5
V
OUT
= 1.5V
V
OUT
= 2.5V
V
OUT
= 3.3V
Figure 2. Maximum Output Current vs Input Voltage
OPERATIO
U
(Refer to Block Diagram)

LTC1875EGN#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 15uA Quiescent Current, 1.5A Synch Step-dwn Reg
Lifecycle:
New from this manufacturer.
Delivery:
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