Set the third compensation pole at 1/2 of the switching
frequency. Calculate C2 as follows:
The above equations provide application compensation
when the zero-cross frequency is significantly higher
than the double-pole frequency. When the zero-cross
frequency is near the double-pole frequency, the actual
zero-cross frequency is higher than the calculated fre-
quency. In this case, lowering the value of R1 reduces
the zero-cross frequency. Also, set the third pole of the
type III compensation close to the switching frequency
if the zero-cross frequency is above 200kHz to boost
the phase margin. The recommended range for R3 is
2kΩ to 10kΩ. Note that the loop compensation remains
unchanged if only R4’s resistance is altered to set dif-
ferent outputs.
MODE Selection
The MAX15038 features a mode selection input
(MODE) that users can select a functional mode for the
device (see Table 2).
Forced-PWM Mode
Connect MODE to GND to select forced-PWM mode. In
forced-PWM mode, the MAX15038 operates at a con-
stant switching frequency (set by the resistor at FREQ
terminal) with no pulse skipping. PWM operation starts
after a brief settling time when EN goes high. The low-
side switch turns on first, charging the bootstrap capaci-
tor to provide the gate-drive voltage for the high-side
switch. The low-side switch turns off either at the end of
the clock period or once the low-side switch sinks
0.875A current (typ), whichever occurs first. If the low-
side switch is turned off before the end of the clock peri-
od, the high-side switch is turned on for the remaining
part of the time interval until the inductor current reaches
0.58A, or the end of clock cycle is encountered.
Starting from the first PWM activity, the sink current
threshold is increased through an internal 4-step DAC
to reach the current limit of 7A after 128 clock periods.
This is done to help a smooth recovery of the regulated
voltage even in case of accidental prebiased output in
spite of the initial forced-PWM mode selection.
Soft-Starting into a Prebiased Output
Mode (Monotonic Startup)
When MODE is left unconnected or biased to V
DD
/2, the
MAX15038 soft-starts into a prebiased output without dis-
charging the output capacitor. This type of operation is
also termed monotonic startup. See the Starting Into
Prebiased Output waveforms in the
Typical Operating
Characteristics
section for an example.
In monotonic startup mode, both low-side and high-
side switches remain off to avoid discharging the prebi-
ased output. PWM operation starts when the FB voltage
crosses the SS voltage. As in forced-PWM mode, the
PWM activity starts with the low-side switch turning on
first to build the bootstrap capacitor charge.
The MAX15038 is also able to start into prebiased with
the output above the nominal set point without abruptly
discharging the output, thanks to the sink current con-
trol of the low-side switch through a 4-step DAC in 128
clock cycles. Monotonic startup mode automatically
switches to forced-PWM mode 4096 clock cycles delay
C
Rf
S
2
1
1
=
××π
R
C x ESR
C
O
2
3
=
DOUBLE POLE
GAIN (dB)
SECOND
POLE
FIRST AND SECOND ZEROS
POWER-STAGE
TRANSFER
FUNCTION
COMPENSATION
TRANSFER
FUNCTION
OPEN-LOOP
GAIN
THIRD
POLE
Figure 4. Type III Compensation Illustration
MAX15038
4A, 2MHz Step-Down Regulator
with Integrated Switches
16 ______________________________________________________________________________________
MODE CONNECTION OPERATION MODE
GND Forced PWM
Unconnected or V
DD
/2
Forced PWM. Soft-startup into a
prebiased output (monotonic
startup).
V
DD
Skip Mode. Soft-startup into a
prebiased output (monotonic
startup).
Table 2. Mode Selection
MAX15038
after the voltage at FB increases above 92.5% of
V
REFIN
. The additional delay prevents an early transi-
tion from monotonic startup to forced-PWM mode dur-
ing soft-start when a prolonged time constant external
REFIN voltage is applied.
The maximum allowed soft-start time is 2ms when an
external reference is applied at REFIN in the case of
starting up into prebiased output.
Skip Mode
Connect MODE to V
DD
to select skip mode. In skip
mode, the MAX15038 switches only as necessary to
maintain the output at light loads (not capable of sinking
current from the output), but still operates with fixed-fre-
quency (set by the resistor at FREQ terminal) PWM at
medium and heavy loads. This maximizes light-load effi-
ciency and reduces the input quiescent current.
In case of prolonged high-side idle activity (beyond
eight clock cycles), the low-side switch is turned on
briefly to rebuild the charge lost in the bootstrap capac-
itor before the next on-cycle of the high-side switch.
In skip mode, the low-side switch is turned off when the
inductor current decreases to 0.2A (typ) to ensure no
reverse current flowing from the output capacitor and
the best conversion efficiency/minimum supply current.
The high-side switch minimum on-time is controlled to
guarantee that 0.58A current is reached to avoid high
frequency bursts at no load conditions and that might
cause a rapid increase of the supply current caused by
additional switching losses.
Even if skip mode is selected at the device turn-on, the
monotonic startup mode is internally selected during
soft-start. The transition to skip mode is automatically
achieved 4096 clock cycles after the voltage at FB
increases above 92.5% of V
REFIN
.
Changing from skip mode to forced-PWM mode and
vice-versa can be done at any time. The output capaci-
tor should be large enough to limit the output-voltage
overshoot/undershoot due to the settling times to reach
different duty-cycle set points corresponding to forced-
PWM mode and skip mode at light loads.
PCB Layout Considerations and
Thermal Performance
Careful PCB layout is critical to achieve clean and sta-
ble operation. It is highly recommended to duplicate the
MAX15038 EV kit layout for optimum performance. If devi-
ation is necessary, follow these guidelines for good PCB
layout:
1) Connect input and output capacitors to the power
ground plane; connect all other capacitors to the sig-
nal ground plane.
2) Place capacitors on V
DD
, IN, and SS as close as pos-
sible to the IC and its corresponding pin using direct
traces. Keep power ground plane (connected to
PGND) and signal ground plane (connected to GND)
separate.
3) Keep the high-current paths as short and wide as
possible. Keep the path of switching current short
and minimize the loop area formed by LX, the out-
put capacitors, and the input capacitors.
4) Connect IN, LX, and PGND separately to a large
copper area to help cool the IC to further improve
efficiency and long-term reliability.
5) Ensure all feedback connections are short and
direct. Place the feedback resistors and compensa-
tion components as close as possible to the IC.
6) Route high-speed switching nodes, such as LX,
away from sensitive analog areas (FB, COMP).
4A, 2MHz Step-Down Regulator
with Integrated Switches
______________________________________________________________________________________ 17
MAX15038
4A, 2MHz Step-Down Regulator
with Integrated Switches
18 ______________________________________________________________________________________
Chip Information
PROCESS: BiCMOS
THIN QFN
MAX15038
19
20
21
22
12 3456
18 17 16 15 14 13
23
24
12
11
10
9
8
7
PGND
IN
PGND
EP
IN
EN
MODE
V
DD
CTL1
CTL2
REFIN
SS
PGND
PGND
LX
LX
BST
IN
PWRGD
OUT
FREQ
FB
GND
COMP
LX
TOP VIEW
+
Pin Configuration
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
LAND
PATTERN NO.
24 TQFN-EP T2444+4
21-0139 90-0022
Package Information
For the latest package outline information and land patterns,
go to www.maxim-ic.com/packages
. Note that a “+”, “#”, or
“-” in the package code indicates RoHS status only. Package
drawings may show a different suffix character, but the drawing
pertains to the package regardless of RoHS status.

MAX15038ETG+

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Switching Voltage Regulators 4A 2MHz Step-Down w/Integrated Switch
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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