25
IDT72V51233/72V51243/72V51253 3.3V, MULTI-QUEUE FLOW-CONTROL DEVICES
(4 QUEUES) 18 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
the devices connected in expansion. In expansion mode one device will be
set as the Master, MAST input tied HIGH, all other devices will have MAST
tied LOW. The master device is the first device to take control of the PAEn bus
and place the PAE status of its queues onto the bus on the first rising edge of
RCLK after the MRS input goes HIGH once a Master Reset is complete. The
ESYNC (PAE sync pulse) output of the first device (master device), will be HIGH
for one cycle of RCLK indicating that it is has control of the PAEn bus for that
cycle.
The device also passes a “token” onto the next device in the chain, the next
device assuming control of the PAEn bus on the next RCLK cycle. This token
passing is done via the EXO outputs and EXI inputs of the devices (“PAEn
Expansion Out” and “PAEn Expansion In”). The EXO output of the first device
connecting to the EXI input of the second device in the chain, the EXO of the
second device connects to the EXI of the third device and so on. The EXO of
the final device in a chain connects to the EXI of the first device, so that once the
PAEn bus has cycled through all devices control is again passed to the first
device. The EXO output of a device will be HIGH for the RCLK cycle it has control
of the bus.
Please refer to Figure 25, PAEn Bus – Polled Mode for timing information.
26
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
IDT72V51233/72V51243/72V51253 3.3V, MULTI-QUEUE FLOW-CONTROL DEVICES
(4 QUEUES) 18 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits
D17-D9
A
A
B
B
(a) x18 INPUT to x18 OUTPUT - BIG ENDIAN
(b) x18 INPUT to x18 OUTPUT - LITTLE ENDIAN
Write to Queue
Read from Queue
BYTE ORDER ON INPUT PORT:
BYTE ORDER ON OUTPUT PORT:
BA
Read from Queue
A
(c) x18 INPUT to x9 OUTPUT - BIG ENDIAN
1st: Read from Queue
B
2nd: Read from Queue
B
(d) x18 INPUT to x9 OUTPUT - LITTLE ENDIAN
1st: Read from Queue
A
2nd: Read from Queue
A
(a) x9 INPUT to x18 OUTPUT - BIG ENDIAN
1st: Write to Queue
BYTE ORDER ON INPUT PORT:
B
2nd: Write to Queue
BYTE ORDER ON OUTPUT PORT:
AB
Read from Queue
(a) x9 INPUT to x18 OUTPUT - LITTLE ENDIAN
B
A
Read from Queue
5941 drw07
BE IW OW
H L H
BE IW OW
L H L
BE IW OW
H H L
BE IW OW
L L H
BE IW OW
H L L
BE IW OW
L L L
D8-D0
Q17-Q9
Q8-Q0
Q17-Q9
Q8-Q0
Q17-Q9
Q8-Q0
Q17-Q9
Q8-Q0
Q17-Q9
Q8-Q0
Q17-Q9
Q8-Q0
D17-D9
D8-D0
D17-Q9
D8-Q0
Q17-Q9
Q8-Q0
Q17-Q9
Q8-Q0
Figure 3. Bus-Matching Byte Arrangement
27
IDT72V51233/72V51243/72V51253 3.3V, MULTI-QUEUE FLOW-CONTROL DEVICES
(4 QUEUES) 18 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
tRS
MRS
WEN
REN
tRSS
FSTR,
ESTR
5941 drw08
DF
DFM
HIGH = Default Programming
LOW = Serial Programming
HIGH = Offset Value is 128
LOW = Offset value is 8
tRSS
tRSS
tRSR
SENI
WADEN,
RADEN
tRSS
tRSS
tRSS
OW, IW
FM
HIGH = Looped
LOW = Strobed (Direct)
ID0, ID1,
ID2
tRSS
MAST
HIGH = Master Device
LOW = Slave Device
tRSS
tRSS
tRSS
FF
tRSF
OV
tRSF
PAF
tRSF
PAE
tRSF
tRSF
tRSF
Qn
tRSF
LOGIC "1" if OE is LOW and device is Master
HIGH-Z if OE is HIGH or Device is Slave
LOGIC "1" if Master Device
HIGH-Z if Slave Device
LOGIC "1" if Master Device
HIGH-Z if Slave Device
HIGH-Z if Slave Device
LOGIC "0" if Master Device
HIGH-Z if Slave Device
LOGIC "0" if Master Device
LOGIC "1" if Master Device
HIGH-Z if Slave Device
PAFn
PAEn
HIGH-Z if Slave Device
LOGIC “0" if Master Device
Figure 4. Master Reset
NOTES:
1. OE can toggle during this period.
2. PRS should be HIGH during a MRS.

72V51253L7-5BB

Mfr. #:
Manufacturer:
IDT
Description:
FIFO X18 4Q 2M MULTI-QUE
Lifecycle:
New from this manufacturer.
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