ADG619/ADG620
Rev. C | Page 10 of 16
TERMINOLOGY
I
DD
Positive supply current.
I
SS
Negative supply current.
R
ON
Ohmic resistance between D and S terminals.
ΔR
ON
On resistance match between any two channels.
R
FLAT (ON)
Flatness is defined as the difference between the maximum and
minimum value of on resistance as measured over the specified
analog signal range.
I
S
(Off)
Source leakage current with the switch off.
I
D
, I
S
(On)
Channel leakage current with the switch on.
V
D
, V
S
Analog voltage on Terminal D and Terminal S.
V
INL
Maximum input voltage for Logic 0.
V
INH
Minimum input voltage for Logic 1.
I
INL
, I
INH
Input current of the digital input.
C
S
(Off)
Off switch source capacitance.
C
D
, C
S
(On)
On switch capacitance.
t
ON
Delay between applying the digital control input and the output
switching on.
t
OFF
Delay between applying the digital control input and the output
switching off.
t
MBB
On time is measured between the 80% points of both switches,
when switching from one address state to another.
t
BBM
Off time or on time is measured between the 90% points of
both switches, when switching from one address state
to another.
Charge Injection
A measure of the glitch impulse transferred from the digital
input to the analog output during switching.
Crosstalk
A measure of unwanted signal coupled through from one
channel to another as a result of parasitic capacitance.
Off Isolation
A measure of unwanted signal coupling through an off switch.
Bandwidth
The frequency response of the on switch.
Insertion Loss
The loss due to the on resistance of the switch.
ADG619/ADG620
Rev. C | Page 11 of 16
TEST CIRCUITS
I
DS
V1
S
V
S
R
ON
=V1/I
DS
D
02617-015
SD
V
D
V
S
I
D
(OFF)I
S
(OFF)
AA
02617-016
SD
V
D
I
D
(ON)
NC
A
02617-017
Figure 15. On Resistance Figure 16. Off Leakage Figure 17. On Leakage
V
DD
0.1µF
V
S
IN
SD
V
DD
GND
R
L
300
C
L
35pF
V
OUT
V
SS
0.1µF
V
SS
50% 50%
90%
90%
V
IN
V
OUT
t
OFF
t
ON
02617-018
Figure 18. Switching Times
D
V
DD
GND
90% 90%
50%
0V
0V
V
SS
V
DD
V
S1
IN
S1
R
L2
300
C
L2
35pF
V
OUT
V
SS
0.1µF
V
IN
V
OUT
t
BBM
V
S2
V
IN
S2
D2
0.1µF
t
BBM
50%
02617-019
Figure 19. Break-Before-Make Time Delay, t
BBM
(ADG619 Only)
V
S1
V
DD
GND
V
SS
V
DD
V
S1
IN
R
L2
300
C
L2
35pF
V
SS
0.1µF
V
D
V
IN
0.1µF
C
L1
35pF
R
L1
300
50% 50%
0V
V
IN
V
S1
V
S2
80%V
D
80%V
D
t
MBB
02617-020
Figure 20. Make-Before-Break Time Delay, t
MBB
(ADG620 Only)
DS
V
DD
IN
V
S
GND
C
L
1nF
V
OUT
R
S
V
DD
V
SS
V
SS
V
IN
V
OUT
ΔV
OUT
Q
INJ
=C
L
× ΔV
OUT
ΔV
OUT
S1
S2
02617-021
Figure 21. Charge Injection
ADG619/ADG620
Rev. C | Page 12 of 16
50
NETWORK
ANALYZER
R
L
50
IN
GND
S
0.1µF
D
50
OFF ISOLATION = 20 log
V
OUT
V
OUT
V
S
0.1µF
V
SS
V
DD
V
SS
V
IN
V
S
V
DD
02617-022
Figure 22. Off Isolation
GND
V
DD
0.1µF
V
DD
V
SS
0.1µF
V
SS
S1
D
S2
V
S
NETWORK
ANALYZER
IN
50
R
50
R
50
V
OUT
C
HANNEL-TO-CHANNEL CROSSTALK = 20 log
V
S
V
OUT
02617-023
Figure 23. Channel-to-Channel Crosstalk
V
OUT
50
NETWORK
ANALYZER
R
L
50
IN
GND
V
IN
S
0.1µF
D
INSERTION LOSS = 20 log
V
OUT
WITH SWITCH
V
S
WITHOUT SWITCH
0.1µF
V
SS
V
DD
V
SS
V
S
V
DD
02617-024
Figure 24. Bandwidth

ADG619BRTZ-REEL

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Analog Switch ICs 4 Ohm 5.5V CMOS SGL SPDT
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union