1. General description
The GTL2107 is a customized translator between dual Xeon processors, GTL−/GTL/GTL+
I/O and the Platform Health Management, South Bridge and Power Supply 3.3 V LVTTL
and GTL signals.
2. Features
Operates as a GTL to LVTTL sampling receiver or LVTTL to GTL driver
Operates at GTL, GTL+ or GTL− levels
EN1 and EN2 enable control
3.0 V to 3.6 V operation
LVTTL I/O not 5 V tolerant
Series termination on the LVTTL outputs of 30 Ω
ESD protection exceeds 2000 V HBM per JESD22-A114, 150 V MM per
JESD22-A115, and 1000 V CDM per JESD22-C101
Latch-up testing is done to JEDEC Standard JESD78 Class II, Level A which exceeds
500 mA
Package offered: TSSOP28
3. Quick reference data
GTL2107
12-bit GTL−/GTL/GTL+ to LVTTL translator
Rev. 05 — 23 December 2009 Product data sheet
Table 1. Quick reference data
T
amb
=25
°
C.
Symbol Parameter Conditions Min Typ Max Unit
V
ref
=0.73V; V
TT
=1.1V
t
PLH
LOW to HIGH
propagation delay
nA to nBI; see Figure 4 148ns
nBI to nA or nAO (open-drain outputs); see Figure 13
21318ns
t
PHL
HIGH to LOW
propagation delay
nA to nBI; see Figure 4 2 5.5 10 ns
nBI to nA or nAO (open-drain outputs); see Figure 13
2 4 10 ns
V
ref
=0.76V; V
TT
=1.2V
t
PLH
LOW to HIGH
propagation delay
nA to nBI; see Figure 4 148ns
nBI to nA or nAO (open-drain outputs); see Figure 13
21318ns
t
PHL
HIGH to LOW
propagation delay
nA to nBI; see Figure 4 2 5.5 10 ns
nBI to nA or nAO (open-drain outputs); see Figure 13
2 4 10 ns
