LTC4006EGN-2#PBF Datasheet LTC4006EGN-6#PBF, LTC4006EGN-4#PBF, LTC4006EGN-2#PBF | P13-P15

LTC4006

4006fa

Soft-Start

The LTC4006 is soft started by the 0.12µF capacitor on the

pin. On start-up, I

pin voltage will rise quickly to 0.5V,

then ramp up at a rate set by the internal 40µA pull-up

current and the external capacitor. Battery charging

current starts ramping up when I

voltage reaches 0.8V

and full current is achieved with I

at 2V. With a 0.12µF

capacitor, time to reach full charge current is about 2ms

and it is assumed that input voltage to the charger will

reach full value in less than 2ms. The capacitor can be

increased up to 1µF if longer input start-up times are

needed.

Input and Output Capacitors

The input capacitor (C2) is assumed to absorb all input

switching ripple current in the converter, so it must have

adequate ripple current rating. Worst-case RMS ripple

current will be equal to one half of output charging current.

Actual capacitance value is not critical. Solid tantalum low

ESR capacitors have high ripple current rating in a rela-

tively small surface mount package,

but caution must be

used when tantalum capacitors are used for input or

output bypass

. High input surge currents can be created

when the adapter is hot-plugged to the charger or when a

battery is connected to the charger. Solid tantalum capaci-

tors have a known failure mechanism when subjected to

very high turn-on surge currents. Only Kemet T495 series

of “Surge Robust” low ESR tantalums are rated for high

surge conditions such as battery to ground.

The relatively high ESR of an aluminum electrolytic for C1,

located at the AC adapter input terminal, is helpful in

reducing ringing during the hot-plug event. Refer to Appli-

cation Note 88 for more information.

Highest possible voltage rating on the capacitor will mini-

mize problems. Consult with the manufacturer before use.

Alternatives include new high capacity ceramic (at least

20µF) from Tokin, United Chemi-Con/Marcon, et al. Other

alternative capacitors include OS-CON capacitors from

Sanyo.

The output capacitor (C3) is also assumed to absorb

output switching current ripple. The general formula for

capacitor current is:

APPLICATIO S I FOR ATIO

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RMS

BAT

DCIN

()

⎛

⎝

⎜

⎞

⎠

⎟

()()

029 1

.–

For example:

DCIN

= 19V, V

BAT

= 12.6V, L1 = 10µH, and

f = 300kHz, I

RMS

= 0.41A.

EMI considerations usually make it desirable to minimize

ripple current in the battery leads, and beads or inductors

may be added to increase battery impedance at the 300kHz

switching frequency. Switching ripple current splits be-

tween the battery and the output capacitor depending on

the ESR of the output capacitor and the battery impedance.

If the ESR of C3

is 0.2Ω and the battery impedance is

raised to 4Ω with a bead or inductor, only 5% of the

current ripple will flow in the battery.

Inductor Selection

Higher operating frequencies allow the use of smaller

inductor and capacitor values. A higher frequency gener-

ally results in lower efficiency because of MOSFET gate

charge losses. In addition, the effect of inductor value on

ripple current and low current operation must also be

considered. The inductor ripple current ∆I

decreases

with higher frequency and increases with higher V

∆ =

()( )

⎛

⎝

⎜

⎞

⎠

⎟

L OUT

OUT

1–

Accepting larger values of ∆I

allows the use of low

inductances, but results in higher output voltage ripple

and greater core losses. A reasonable starting point for

setting ripple current is ∆I

= 0.4(I

MAX

). In no case should

∆I

exceed 0.6(I

MAX

) due to limits imposed by I

REV

and

CA1. Remember the maximum ∆I

occurs at the maxi-

mum input voltage. In practice 10µH is the lowest value

recommended for use.

Lower charger currents generally call for larger inductor

values. Use Table 4 as a guide for selecting the correct

inductor value for your application.

LTC4006

4006fa

Table 4

MAXIMUM INPUT MINIMUM INDUCTOR

AVERAGE CURRENT (A) VOLTAGE (V) VALUE (µH)

1 ≤20 40 ±20%

1 >20 56 ±20%

2 ≤20 20 ±20%

2 >20 30 ±20%

3 ≤20 15 ±20%

3 >20 20 ±20%

4 ≤20 10 ±20%

4 >20 15 ±20%

Charger Switching Power MOSFET

and Diode Selection

Two external power MOSFETs must be selected for use

with the charger: a P-channel MOSFET for the top (main)

switch and an N-channel MOSFET for the bottom (syn-

chronous) switch.

The peak-to-peak gate drive levels are set internally. This

voltage is typically 6V. Consequently, logic-level threshold

MOSFETs must be used. Pay close attention to the BV

DSS

specification for the MOSFETs as well; many of the logic

level MOSFETs are limited to 30V or less.

Selection criteria for the power MOSFETs include the “ON”

resistance R

DS(ON)

, total gate capacitance Q

, reverse

transfer capacitance C

RSS

, input voltage and maximum

output current. The charger is operating in continuous

mode at moderate to high currents so the duty cycles for

the top and bottom MOSFETs are given by:

Main Switch Duty Cycle = V

OUT

Synchronous Switch Duty Cycle = (V

– V

OUT

)/V

The MOSFET power dissipations at maximum output

current are given by:

PMAIN = V

OUT

MAX

)(1 + δ∆T)R

DS(ON)

+ k(V

)(I

MAX

)(C

RSS

)(f

OSC

)

PSYNC = (V

– V

OUT

)/V

MAX

)(1 + δ∆T)R

DS(ON)

Where δ is the temperature dependency of R

DS(ON)

and k

is a constant inversely related to the gate drive current.

Both MOSFETs have I

R losses while the PMAIN equation

includes an additional term for transition losses, which are

highest at high input voltages. For V

< 20V the high

current efficiency generally improves with larger MOSFETs,

while for V

> 20V the transition losses rapidly increase

to the point that the use of a higher R

DS(ON)

device with

lower C

RSS

actually provides higher efficiency. The syn-

chronous MOSFET losses are greatest at high input volt-

age or during a short circuit when the duty cycle in this

switch is nearly 100%. The term (1 + δ∆T) is generally

given for a MOSFET in the form of a normalized R

DS(ON)

temperature curve, but δ = 0.005/°C can be used as an

approximation for low voltage MOSFETs. C

RSS

is usually

specified in the MOSFET characteristics; if not, then C

RSS

can be calculated using C

RSS

= Q

/∆V

. The constant

k = 2 can be used to estimate the contributions of the two

terms in the main switch dissipation equation.

If the charger is to operate in low dropout mode or with a

high duty cycle greater than 85%, then the topside

P-channel efficiency generally improves with a larger

MOSFET. Using asymmetrical MOSFETs may achieve cost

savings or efficiency gains.

The Schottky diode D1, shown in the Typical Application

on the back page, conducts during the dead-time between

the conduction of the two power MOSFETs. This prevents

the body diode of the bottom MOSFET from turning on and

storing charge during the dead-time, which could cost as

much as 1% in efficiency. A 1A Schottky is generally a

good size for 4A regulators due to the relatively small

average current. Larger diodes can result in additional

transition losses due to their larger junction capacitance.

The diode may be omitted if the efficiency loss can be

tolerated.

Calculating IC Power Dissipation

The power dissipation of the LTC4006 is dependent upon

the gate charge of the top and bottom MOSFETs (Q

and

respectively). The gate charge is determined from the

manufacturer’s data sheet and is dependent upon both the

gate voltage swing and the drain voltage swing of the

MOSFET. Use 6V for the gate voltage swing and V

DCIN

for

the drain voltage swing.

= V

DCIN

• (f

OSC

+ Q

) + I

DCIN

)

APPLICATIO S I FOR ATIO

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LTC4006

4006fa

Table 5. Common R

Resistor Values

ADAPTER –7% ADAPTER R

VALUE* R

POWER R

POWER

RATING (A) RATING (A) (Ω) 1% LIMIT (A) DISSIPATION (W) RATING (W)

1.5 1.40 0.068 1.47 0.15 0.25

1.8 1.67 0.062 1.61 0.16 0.25

2.0 1.86 0.051 1.96 0.20 0.25

2.3 2.14 0.047 2.13 0.21 0.25

2.5 2.33 0.043 2.33 0.23 0.50

2.7 2.51 0.039 2.56 0.26 0.50

3.0 2.79 0.036 2.79 0.28 0.50

3.3 3.07 0.033 3.07 0.31 0.50

3.6 3.35 0.030 3.35 0.33 0.50

4.0 3.72 0.027 3.72 0.37 0.50

* Rounded to nearest 5% standard step value. Many non-standard values are popular.

APPLICATIO S I FOR ATIO

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Figure 9. Adapter Current Limiting

between the CLP and DCIN pins. When this voltage ex-

ceeds 100mV, the amplifier will override programmed

charging current to limit adapter current to 100mV/R

. A

lowpass filter formed by 5kΩ and 15nF is required to

eliminate switching noise. If the current limit is not used,

CLP should be connected to CLN.

Setting Input Current Limit

To set the input current limit, you need to know the

minimum wall adapter current rating. Subtract 7% for the

input current limit tolerance and use that current to deter-

mine the resistor value.

= 100mV/I

LIM

= Adapter Min Current –

(Adapter Min Current • 7%)

As is often the case, the wall adapter will usually have at

least a +10% current limit margin and many times one can

simply set the adapter current limit value to the actual

adapter rating (see Figure 9).

Designing the Thermistor Network

There are several networks that will yield the desired

function of voltage vs temperature needed for proper

operation of the thermistor. The simplest of these is the

voltage divider shown in Figure 10. Unfortunately, since

the HIGH/LOW comparator thresholds are fixed internally,

there is only one thermistor type that can be used in this

network; the thermistor must have a HIGH/LOW resis-

tance ratio of 1:7. If this happy circumstance is true for

100mV

–

CLP

LTC4006

CLN

4006 F09

15nF

CL1

AC ADAPTER

INPUT

100mV

ADAPTER CURRENT LIMIT

TO SYSTEM

LOAD

Example:

DCIN

= 19V, f

OSC

= 345kHz, Q

= Q

= 15nC.

PD = 292mW

DCIN

= 5mA

Adapter Limiting

An important feature of the LTC4006 is the ability to

automatically adjust charging current to a level which

avoids overloading the wall adapter. This allows the prod-

uct to operate at the same time that batteries are being

charged without complex load management algorithms.

Additionally, batteries will automatically be charged at the

maximum possible rate of which the adapter is capable.

This feature is created by sensing total adapter output

current and adjusting charging current downward if a

preset adapter current limit is exceeded. True analog

control is used, with closed-loop feedback ensuring that

adapter load current remains within limits. Amplifier CL1

in Figure 9 senses the voltage across R

, connected

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LTC4006EGN-2#PBF

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Manufacturer:

Analog Devices / Linear Technology

Description:

Battery Management 4A, Simplified Li-Ion Charger for 3-Cell

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