CY2304
Document Number: 38-07247 Rev. *O Page 7 of 17
Operating Conditions
For CY2304SXI Industrial Temperature Devices
Parameter Description Min Max Unit
V
DD
Supply voltage 3.0 3.6 V
T
A
Operating temperature (ambient temperature) –40 85 °C
C
L
Load capacitance (below 100 MHz) 30 pF
Load capacitance (from 100 MHz to 133 MHz) 15 pF
C
IN
Input capacitance 7 pF
Electrical Characteristics
For CY2304SXI Industrial Temperature Devices
Parameter Description Test Conditions Min Max Unit
V
IL
Input LOW voltage 0.8 V
V
IH
Input HIGH voltage 2.0 V
I
IL
Input LOW current V
IN
= 0 V 50.0 A
I
IH
Input HIGH current V
IN
= V
DD
100.0 A
V
OL
Output LOW voltage
[7]
I
OL
= 8 mA (-1, -2) 0.4 V
V
OH
Output HIGH voltage
[7]
I
OH
= –8 mA (-1, -2) 2.4 V
I
DD
(PD mode) Power-down supply current REF = 0 MHz 25.0 A
I
DD
Supply current Unloaded outputs, 100 MHz, Select inputs at V
DD
or GND
–45.0mA
Unloaded outputs, 66 MHz REF (-1, -2) 35.0 mA
Unloaded outputs, 33 MHz REF (-1, -2) 20.0 mA
Note
7. Parameter is guaranteed by design and characterization. Not 100% tested in production.
CY2304
Document Number: 38-07247 Rev. *O Page 8 of 17
Thermal Resistance
Parameter
[8]
Description Test Conditions 8-pin SOIC Unit
θ
JA
Thermal resistance
(junction to ambient)
Test conditions follow standard test methods and
procedures for measuring thermal impedance, in
accordance with EIA/JESD51.
140 °C/W
θ
JC
Thermal resistance
(junction to case)
54 °C/W
Test Circuit
Figure 3. Test Circuit # 1
Note
8. These parameters are guaranteed by design and are not tested.
CY2304
Document Number: 38-07247 Rev. *O Page 9 of 17
Switching Characteristics
for CY2304SXI Industrial Temperature Devices
Parameter
[9]
Name Test Conditions Min Typ Max Unit
t
1
Output frequency 30-pF load, All devices 10 100 MHz
t
1
Output frequency 15-pF load, All devices 10 133.3 MHz
t
DC
Duty cycle
[10]
= t
2
t
1
(-1, -2)
Measured at 1.4 V, F
OUT
= 66.66
MHz,
30-pF load
40.0 50.0 60.0 %
t
DC
Duty cycle
[10]
= t
2
t
1
(-2)
Measured at 1.4 V,
F
OUT
= 83.0 MHz, 15-pF load
40.0 50.0 60.0 %
t
DC
Duty cycle
[10]
= t
2
t
1
(-1, -2)
Measured at 1.4 V,
F
OUT
< 50 MHz, 15-pF load
45.0 50.0 55.0 %
t
3
Rise time
[10]
(-1, -2)
Measured between 0.8 V and 2.0 V,
30-pF load
2.50 ns
t
3
Rise time
[10]
(-1, -2)
Measured between 0.8 V and 2.0 V,
15-pF load
1.50 ns
t
4
Fall time
[10]
(-1, -2)
Measured between 0.8 V and 2.0 V,
30-pF load
2.50 ns
t
4
Fall time
[10]
(-1, -2)
Measured between 0.8 V and 2.0 V,
15-pF load
1.50 ns
t
5
Output-to-output skew on same
bank (-1, -2)
[10]
All outputs equally loaded 200 ps
Output bank A to output bank B
skew (-1)
All outputs equally loaded 200 ps
Output bank A to output bank B
skew (-2)
All outputs equally loaded 400 ps
t
6
Skew, REF rising edge to FBK
rising edge
[10]
Measured at V
DD
/2 0 250 ps
t
7
Device-to-device skew
[10]
Measured at V
DD
/2 on the FBK pins
of devices
0 500 ps
t
J
Cycle-to-cycle jitter
[10]
(-1)
Measured at 66.67 MHz,
loaded outputs, 15-pF load
180 ps
Measured at 66.67 MHz,
loaded outputs, 30-pF load
200 ps
Measured at 133.3 MHz,
loaded outputs, 15-pF load
100 ps
t
J
Cycle-to-cycle jitter
[10]
(-2)
Measured at 66.67 MHz,
loaded outputs, 30-pF load
400 ps
Measured at 66.67 MHz,
loaded outputs, 15-pF load
380 ps
t
LOCK
PLL lock time
[10]
Stable power supply, valid clocks
presented on REF and FBK pins
1.0 ms
Notes
9. All parameters are specified with loaded output.
10. Parameter is guaranteed by design and characterization. Not 100% tested in production.

CY2304SXC-2

Mfr. #:
Manufacturer:
Cypress Semiconductor
Description:
Clock Buffer 3.3VZDB COM
Lifecycle:
New from this manufacturer.
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