BUK9675-55A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 2 — 8 February 2011 3 of 13
NXP Semiconductors
BUK9675-55A
N-channel TrenchMOS logic level FET
4. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
V
DS
drain-source voltage T
j
≥ 25 °C; T
j
≤ 175 °C - 55 V
V
DGR
drain-gate voltage R
GS
=20kΩ -55V
V
GS
gate-source voltage -10 10 V
I
D
drain current T
mb
=25°C; V
GS
=5V; see Figure 1;
see Figure 3
-20A
T
mb
=100°C; V
GS
=5V; see Figure 1 -14A
I
DM
peak drain current T
mb
= 25 °C; pulsed; t
p
≤ 10 µs;
see Figure 3
-81A
P
tot
total power dissipation T
mb
=25°C; see Figure 2 -62W
T
stg
storage temperature -55 175 °C
T
j
junction temperature -55 175 °C
V
GSM
peak gate-source voltage pulsed; t
p
≤ 50 µs -15 15 V
Source-drain diode
I
S
source current T
mb
=25°C - 20 A
I
SM
peak source current pulsed; t
p
≤ 10 µs; T
mb
=25°C - 81 A
Avalanche ruggedness
E
DS(AL)S
non-repetitive drain-source
avalanche energy
I
D
=12A; V
sup
≤ 55 V; R
GS
=50Ω;
V
GS
=5V; T
j(init)
= 25 °C; unclamped
-72mJ
Fig 1. Normalized continuous drain current as a
function of mounting base temperature
Fig 2. Normalized total power dissipation as a
function of mounting base temperature
T
mb
(°C)
0 20015050 100
40
80
120
I
der
(%)
0
T
mb
(°C)
0 20015050 100
40
80
120
P
der
(%)
0
