PCA9545A_45B_45C All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 9 — 5 May 2014 4 of 32
NXP Semiconductors
PCA9545A/45B/45C
4-channel I
2
C-bus switch with interrupt logic and reset
5. Pinning information
5.1 Pinning
Fig 2. Pin configuration for SO20 Fig 3. Pin configuration for TSSOP20
Fig 4. Pin configuration for HVQFN20 (transparent top view)
PCA9545AD
A0 V
DD
A1 SDA
RESET SCL
INT0 INT
SD0 SC3
SC0 SD3
INT1 INT3
SD1 SC2
SC1 SD2
V
SS
INT2
002aab165
1
2
3
4
5
6
7
8
9
10
12
11
14
13
16
15
18
17
20
19
V
DD
SDA
SCL
INT
SC3
SD3
INT3
SC2
SD2
INT2
A0
A1
RESET
INT0
SD0
SC0
INT1
SD1
SC1
V
SS
PCA9545APW
PCA9545BPW
PCA9545CPW
002aab166
1
2
3
4
5
6
7
8
9
10
12
11
14
13
16
15
18
17
20
19
V
DD
SDA
SCL
INT
SC3
SD3
INT3
SC2
A0
A1
RESET
INT0
SD0
SC0
INT1
SD1
SC1
V
SS
002aab167
PCA9545ABS
Transparent top view
5 11
4 12
3 13
2 14
1 15
6
7
8
9
10
20
19
18
17
16
terminal 1
index area
SD2
INT2
PCA9545A_45B_45C All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 9 — 5 May 2014 5 of 32
NXP Semiconductors
PCA9545A/45B/45C
4-channel I
2
C-bus switch with interrupt logic and reset
5.2 Pin description
[1] HVQFN20 package die supply ground is connected to both the V
SS
pin and the exposed center pad. The
V
SS
pin must be connected to supply ground for proper device operation. For enhanced thermal, electrical,
and board-level performance, the exposed pad must be soldered to the board using a corresponding
thermal pad on the board, and for proper heat conduction through the board thermal vias must be
incorporated in the PCB in the thermal pad region.
Table 3. Pin description
Symbol Pin Description
SO20, TSSOP20 HVQFN20
A0 1 19 address input 0
A1 2 20 address input 1
RESET
3 1 active LOW reset input
INT0
4 2 active LOW interrupt input 0
SD0 5 3 serial data 0
SC0 6 4 serial clock 0
INT1
7 5 active LOW interrupt input 1
SD1 8 6 serial data 1
SC1 9 7 serial clock 1
V
SS
10 8
[1]
supply ground
INT2
11 9 active LOW interrupt input 2
SD2 12 10 serial data 2
SC2 13 11 serial clock 2
INT3
14 12 active LOW interrupt input 3
SD3 15 13 serial data 3
SC3 16 14 serial clock 3
INT
17 15 active LOW interrupt output
SCL 18 16 serial clock line
SDA 19 17 serial data line
V
DD
20 18 supply voltage
PCA9545A_45B_45C All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 9 — 5 May 2014 6 of 32
NXP Semiconductors
PCA9545A/45B/45C
4-channel I
2
C-bus switch with interrupt logic and reset
6. Functional description
Refer to Figure 1 “Block diagram of PCA9545A/45B/45C.
6.1 Device address
Following a START condition, the bus master must output the address of the slave it is
accessing. The address of the PCA9545A is shown in Figure 5
. To conserve power, no
internal pull-up resistors are incorporated on the hardware selectable address pins and
they must be pulled HIGH or LOW.
The last bit of the slave address defines the operation to be performed. When set to
logic 1, a read is selected while a logic 0 selects a write operation.
The PCA9545BPW and PCA9545CPW are alternate address versions if needed for larger
systems or to resolve conflicts. The data sheet references the PCA9545A, but the
PCA9545B and PCA9545C function identically except for the slave address.
Fig 5. Slave address PCA9545A
Fig 6. Slave address PCA9545B Fig 7. Slave address PCA9545C
002aab169
1 1 1 0 0 A1 A0 R/W
fixed hardware
selectable
002aab835
1 1 0 1 0 A1 A0 R/W
fixed hardware
selectable
002aab836
1 0 1 1 0 A1 A0 R/W
fixed hardware
selectable

PCA9545AD,112

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
Multiplexer Switch ICs 4-CH I2C SWITCH
Lifecycle:
New from this manufacturer.
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