10
FN8175.4
September 23, 2009
Instruction Format
Read Wiper Counter Register (WCR)
S
T
A
R
T
Device Type
Identifier
Device
Addresses S
A
C
K
Instruction
Opcode
DR/Bank
Addresses S
A
C
K
Wiper Position
(Sent by X9279 on SDA) M
A
C
K
S
T
O
P
0 1 0 1 0A 2A 1A 0 10010000 WC
R7
WC
R6
WC
R5
WC
R4
WC
R3
WC
R2
WC
R1
WC
R0
Write Wiper Counter Register (WCR)
S
T
A
R
T
Device Type
Identifier
Device
Addresses S
A
C
K
Instruction
Opcode
DR/Bank
Addresses S
A
C
K
Wiper Position
(Sent by Master on SDA) S
A
C
K
S
T
O
P
01010A 2A 1A 0 10100000 WC
R7
WC
R6
WC
R5
WC
R4
WC
R3
WC
R2
WC
R1
WC
R0
Read Data Register (DR)
S
T
A
R
T
Device Type
Identifier
Device
Addresses S
A
C
K
Instruction
Opcode
DR/Bank
Addresses S
A
C
K
Wiper Position
(Sent by X9279 on SDA) M
A
C
K
S
T
O
P
0 1 0 1 0A 2A 1A 0 1011RBRAP1 P0 WC
R7
WC
R6
WC
R5
WC
R4
WC
R3
WC
R2
WC
R1
WC
R0
Write Data Register (DR)
S
T
A
R
T
Device Type
Identifier
Device
Addresses
S
A
C
K
Instruction
Opcode
DR/Bank
Addresses
S
A
C
K
Wiper Position
(Sent by Master on SDA)
S
A
C
K
S
T
O
P
HIGH-VOLTAGE
WRITE CYCLE
0 1 0 1 0A 2A 1A 0 1100RBRAP1 P0 WC
R7
WC
R6
WC
R5
WC
R4
WC
R3
WC
R2
WC
R1
WC
R0
Transfer Wiper Counter Register (WCR) to Data Register (DR)
S
T
A
R
T
Device Type
Identifier
Device
Addresses S
A
C
K
Instruction
Opcode
DR/Bank
Addresses S
A
C
K
S
T
O
P
High-Voltage
Write Cycle
0 1 0 1 0A 2A 1A 0 1110RB RA 00
Transfer Data Register (DR) to Wiper Counter Register (WCR)
S
T
A
R
T
Device Type
Identifier
Device
Addresses S
A
C
K
Instruction
Opcode
DR/Bank
Addresses S
A
C
K
S
T
O
P
01010A 2A 1 A 0 1101RB RA00
Increment/Decrement Wiper Counter Register (WCR)
S
T
A
R
T
Device Type
Identifier
Device
Addresses S
A
C
K
Instruction
Opcode
DR/Bank
Addresses S
A
C
K
Increment/Decrement
(Sent by Master on SDA) S
T
O
P
0 1 0 10A 2A 1A 0 00100000 I/DI/D ....I/DI/D
NOTES:
4. “MACK”/”SACK”: stands for the acknowledge sent by the master/slave.
5. “A3 ~ A0”: stands for the device addresses sent by the master.
6. “X”: indicates that it is a “0” for testing purpose but physically it is a “don’t care” condition.
7. “I”: stands for the increment operation, SDA held high during active SCL phase (high).
8. “D”: stands for the decrement operation, SDA held low during active SCL phase (high).
X9279
11
FN8175.4
September 23, 2009
Absolute Maximum Ratings Thermal Information
Voltage on SCL, SDA any Address Input
with respect to VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . -1V to +7V
DV = | (VH - VL) |. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5V
I
W
(10s) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±6mA
Operating Conditions
Temperature Range
Commercial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to +70°C
Industrial. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C
Supply Voltage VCC Limits (Note 13)
X9279. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5V ± 10%
X9279-2.7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 5.5V
Wiper Max Current (I
W
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±3mA
Power Rating @ +25°C, each pot . . . . . . . . . . . . . . . . . . . . . .50mW
Thermal Resistance (Typical, Note 9)
JA
(°C/W)
14 Lead TSSOP. . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
Temperature Under Bias . . . . . . . . . . . . . . . . . . . . .-65°C to +135°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTE:
9.
JA
is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Analog Characteristics Operating Conditions over recommended industrial (2.7V) unless otherwise specified.
SYMBOL PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
R
TOTAL
End-to-End Resistance T version 100 k
R
TOTAL
End-to-End Resistance U version 50 k
End-to-End Resistance Tolerance ±20 %
R
W
Wiper Resistance @ V = 3V I
W
= (V
RH
- V
RL
)/R
TOTAL
300
R
W
Wiper Resistance @ V = 5V I
W
= (V
RH
- V
RL
)/R
TOTAL
150
V
TERM
Voltage on any R
H
or R
L
Pin V
SS
= 0V V
SS
V
CC
V
Noise Ref: 1V -120 dBVHz
Resolution
0.4 %
Absolute Linearity (Note 10) R
w(n)(actual)
- R
w(n)(expected)
(Note 14) ±1 MI
(Note 12)
Relative Linearity
(Note 11) R
w(n + 1)
- [R
w(n) + MI
] (Note 14) ±0.2 MI
(Note 12)
Temperature Coefficient of R
TOTAL
±300 ppm/°C
Ratiometric Temp. Coefficient ±20 ppm/°C
C
H
/C
L
/C
W
Potentiometer Capacitances See Macro model 10/10/25 pF
NOTES:
10. Absolute linearity is utilized to determine actual wiper voltage versus expected voltage as determined by wiper position when used as a
potentiometer.
11. Relative linearity is utilized to determine the actual change in voltage between two successive tap positions when used as a potentiometer. It is
a measure of the error in step size.
12. MI = RTOT / 255 or (R
H
- R
L
)/255, single pot
13. During power-up V
CC
> V
H
, V
L
, and V
W
.
14. n = 0, 1, 2,....,255; m = 0, 1, 2,...., 254.
X9279
12
FN8175.4
September 23, 2009
DC Electrical Specifications Over the recommended Operating Conditions unless otherwise specified.
SYMBOL PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
I
CC1
V
CC
Supply Current (Active) f
SCL
= 400kHz; V
CC
= +6V; SDA = Open;
(for 2-Wire, Active, Read and Volatile Write States
only)
3mA
I
CC2
V
CC
Supply Current
(Non-volatile Write)
f
SCL
= 400kHz; V
CC
= +6V; SDA = Open
(for 2-Wire, Active, Non-volatile Write State only)
5mA
I
SB
V
CC
Current (Standby) V
CC
= +6V; V
IN
= V
SS
or V
CC
; SDA = V
CC
(for 2-Wire, Standby State only)
A
I
LI
Input Leakage Current V
IN
= V
SS
to V
CC
10 µA
I
LO
Output Leakage Current V
OUT
= V
SS
to V
CC
10 µA
V
IH
Input HIGH Voltage V
CC
x 0.7 V
CC
+ 1 V
V
IL
Input LOW Voltage -1 V
CC
x 0.3 V
V
OL
Output LOW Voltage I
OL
= 3mA 0.4 V
Endurance and Data Retention
PARAMETER MIN UNITS
Minimum Endurance 100,000 Data changes per bit per register
Data Retention 100 years
Capacitance
SYMBOL TEST TYP UNITS TEST CONDITIONS
C
IN/OUT
Input /Output capacitance (SDA) 8 pF V
OUT
= 0V
C
IN
Input capacitance (SCL, WP, A2, A1 and A0) 6 pF V
IN
= 0V
Power-Up Timing
SYMBOL PARAMETER MIN MAX UNITS
t
r
V
CC
(Note 15)
V
CC
Power-up rate 0.2 50 V/ms
t
PUR
(Note 16) Power-up to initiation of read operation 1 ms
t
PUW
(Note 16) Power-up to initiation of write operation 50 ms
NOTES:
15. This parameter is not 100% tested.
16. t
PUR
and t
PUW
are the delays required from the time the (last) power supply (V
CC
-) is stable until the specific instruction can be issued. These
parameters are periodically sampled and not 100% tested.
AC Test Conditions
Input Pulse Levels V
CC
x 0.1 to V
CC
x 0.9
Input rise and fall times 10ns
Input and output timing level V
CC
x 0.5
X9279

X9279TV14-2.7T1

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
IC XDCP SGL 256TAP 100K 14-TSSOP
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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