13
FN8175.4
September 23, 2009
Equivalent AC Load Circuit
5V
1533
100pF
SDA PIN
R
H
10pF
C
L
C
L
R
W
R
TOTAL
C
W
25pF
10pF
R
L
SPICE MACROMODEL
3V
867
100pF
SDA PIN
AC Timing
SYMBOL PARAMETER MIN MAX UNITS
f
SCL
Clock Frequency 400 kHz
t
CYC
Clock Cycle Time 2500 ns
t
HIGH
Clock High Time 600 ns
t
LOW
Clock Low Time 1300 ns
t
SU:STA
Start Setup Time 600 ns
t
HD:STA
Start Hold Time 600 ns
t
SU:STO
Stop Setup Time 600 ns
t
SU:DAT
SDA Data Input Setup Time 100 ns
t
HD:DAT
SDA Data Input Hold Time 30 ns
t
R
SCL and SDA Rise Time 300 ns
t
F
SCL and SDA Fall Time 300 ns
t
AA
SCL Low to SDA Data Output Valid Time 0.9 µs
t
DH
SDA Data Output Hold Time 0 ns
t
I
Noise Suppression Time Constant at SCL and SDA inputs 50 ns
t
BUF
Bus Free Time (Prior to Any Transmission) 1200 ns
t
SU:WPA
A0, A1 Setup Time 0 ns
t
HD:WPA
A0, A1 Hold Time 0 ns
High Voltage Write Cycle Timing
SYMBOL PARAMETER TYP MAX UNITS
t
WR
High-voltage write cycle time (store instructions) 5 10 ms
XDCP Timing
SYMBOL PARAMETER MIN MAX UNITS
t
WRPO
Wiper response time after the third (last) power supply is stable 5 10 µs
t
WRL
Wiper response time after instruction issued (all load instructions) 5 10 µs
X9279
