7
FN8175.4
September 23, 2009
TABLE 3. IDENTIFICATION BYTE FORMAT
TABLE 4. INSTRUCTION BYTE FORMAT
TABLE 1. REGISTER SELECTION (R0 TO R3)
RB RA
REGISTER
SELECTION OPERATIONS
0 0 0 Data Register Read and Write; Wiper
Counter Register Operations
0 1 1 Data Register Read and Write; Wiper
Counter Register Operations
1 0 2 Data Register Read and Write; Wiper
Counter Register
Operations
1 1 3 Data Register Read and Write; Wiper
Counter Register
Operations
TABLE 2. REGISTER BANK SELECTION (BANK 0 TO BANK 3)
P1 P0
BANK
SELECTION OPERATIONS
0 0 0 Data Register Read and Write; Wiper
Counter Register Operations
0 1 1 Data Register Read and Write Only
1 0 2 Data Register Read and Write Only
1 1 3 Data Register Read and Write Only
ID3 ID2 ID1 ID0 0 A2 A1 A0
0101
(MSB) (LSB)
Device Type
Identifier
Set to 0
for proper operation
Internal Slave
Address
I3 I2 I1 I0 RB RA P1 P0
(MSB) (LSB)
Instruction Opcode
Register
Pot Selection (Bank Selection)
Set to P0 = 0 for potentiometer operations
Selection
P1 and P0 are used also for register Bank Selection
for 2-Wire Register Write and Read operations
Register Selection
Register Selected RB RA
DR0 0 0
DR1 0 1
DR2 1 0
DR3 1 1
TABLE 5. INSTRUCTION SET
INSTRUCTION
INSTRUCTION Set
OPERATIONI3 I2 I1 I0 RB RA P
1
P
0
Read Wiper Counter Register 1 0 0 1 0 0 0 0 Read the contents of the Wiper Counter Register
Write Wiper Counter
Register
1 0 1 0 0 0 0 0 Write new value to the Wiper Counter Register
Read Data Register 1 0 1 1 1/0 1/0 1/0 1/0 Read the contents of the Data Register pointed to by P1 - P0
and RB - RA
Write Data Register 1 1 0 0 1/0 1/0 1/0 1/0 Write new value to the Data Register pointed to by P1 - P0 and
RB - RA
XFR Data Register to
Wiper Counter Register
1 1 0 1 1/0 1/0 0 0 Transfer the contents of the Data Register pointed to by
RB-RA (Bank 0 only) to the Wiper Counter Register
XFR Wiper Counter
Register to Data Register
1 1 1 0 1/0 1/0 0 0 Transfer the contents of the Wiper Counter Register to the
Register pointed to by RB-RA (Bank 0 only)
Increment/Decrement
Wiper Counter Register
0 0 1 0 0 0 0 0 Enable Increment/decrement of the Wiper Counter Register
NOTE:
3. 1/0 = data is one or zero
X9279
8
FN8175.4
September 23, 2009
Device Description
Wiper Counter Register (WCR)
The X9279 contains a Wiper Counter Register, for the DCP
potentiometer. The Wiper Counter Register can be envisioned
as a 8-bit parallel and serial load counter with its outputs
decoded to select one of 256 switches along its resistor array.
The contents of the WCR can be altered in four ways: it may be
written directly by the host via the Write Wiper Counter Register
instruction (serial load); it may be written indirectly by
transferring the contents of one of four associated data
registers via the XFR Data Register instruction (parallel load); it
can be modified one step at a time by the Increment/Decrement
instruction (see “Instruction Format” on page 10 for more
details). Finally, it is loaded with the contents of its Data
Register zero (DR0) upon power-up.
The Wiper Counter Register is a volatile register; that is, its
contents are lost when the X9279 is powered-down.
Although the register is automatically loaded with the value
in DR0 upon power-up, this may be different from the value
present at power-down. Power-up guidelines are
recommended to ensure proper loadings of the DR0 value
into the WCR. The DR0 value of Bank 0 is the default value.
Data Registers (DR)
The potentiometer has four 8-bit non-volatile Data Registers
(DR3-DR0). These can be read or written directly by the host.
Data can also be transferred between any of the four Data
Registers and the associated Wiper Counter Register. All
operations changing data in one of the Data Registers is a
non-volatile operation and will take a maximum of 10ms.
If the application does not require storage of multiple
settings for the potentiometer, the Data Registers can be
used as regular memory locations for system parameters or
user preference data.
Bit [7:0] are used to store one of the 256 wiper positions
(0~255).
Instructions
Four of the seven instructions are three bytes in length.
These instructions are:
Read Wiper Counter Register – read the current wiper
position of the potentiometer,
Write Wiper Counter Register – change current wiper
position of the potentiometer,
Read Data Register – read the contents of the selected
Data Register;
Write Data Register – write a new value to the selected
Data Register.
The basic sequence of the three byte instructions is
illustrated in Figure 4. These three-byte instructions
exchange data between the WCR and one of the Data
Registers. A transfer from a Data Register to a WCR is
essentially a write to a static RAM, with the static RAM
controlling the wiper position. The response of the wiper to
this action will be delayed by t
WRL
. A transfer from the WCR
(current wiper position), to a Data Register is a write to
non-volatile memory and takes a minimum of t
WR
to
complete. The transfer can occur between the potentiometer
and one of its four associated registers (Bank 0).
Two instructions require a two-byte sequence to complete.
These instructions transfer data between the host and the
X9279; either between the host and one of the data registers
or directly between the host and the Wiper Counter Register.
These instructions are:
XFR Data Register to Wiper Counter Register – This
transfers the contents of one specified Data Register to
the Wiper Counter Register.
XFR Wiper Counter Register to Data Register – This
transfers the contents of the Wiper Counter Register to the
specified Data Register.
The final command is Increment/Decrement (Figures 5
and 6). The Increment/Decrement command is different from
the other commands. Once the command is issued and the
X9279 has responded with an acknowledge, the master can
clock the selected wiper up and/or down in one segment
steps; thereby, providing a fine tuning capability to the host.
For each SCL clock pulse (t
HIGH
) while SDA is HIGH, the
selected wiper will move one resistor segment towards the
R
H
terminal. Similarly, for each SCL clock pulse while SDA is
LOW, the selected wiper will move one resistor segment
towards the R
L
terminal. See “Instruction Format” on
page 10 for more details.
TABLE 6. WIPER COUNTER REGISTER, WCR (8-bit), WCR[7:0]: (Used to store the current wiper position (Volatile, V)
WCR7 WCR6 WCR5 WCR4 WCR3 WCR2 WCR1 WCR0
VVVVVVVV
(MSB) (LSB)
TABLE 7. DATA REGISTER, DR (8-BIT), BIT [7:0]: Used to store wiper positions or data (Non-volatile, NV)
Bit 7Bit 6Bit 5Bit 4Bit 3Bit 2Bit 1Bit 0
NV NV NV NV NV NV NV NV
MSB LSB
X9279
9
FN8175.4
September 23, 2009
These commands only valid when P1 = P0 = 0
S
T
A
R
T
0101
0
A2 A0
A
C
K
I3 I2 I1 I0
RB RA P1 A
C
K
SCL
SDA
S
T
O
P
00
ID3 ID2 ID1 ID0
P0
Device ID
Internal
Instruction
Opcode
Address
Register
Address
Pot/Bank
Address
A1
FIGURE 3. TWO-BYTE INSTRUCTION SEQUENCE
I3
I2
I1
I0
RB RA
0
ID3 ID2
ID1
ID0
Device ID
External
Instruction
Opcode
Address
Register
Address
Pot/Bank
Address
0
WCR[7:0] valid only when P1 = P0 = 0;
or
Data Register D[7:0] for all values of P1 and P0
S
T
A
R
T
0101
A2 A1 A0
A
C
K
P1 P0 A
C
K
SCL
SDA
S
T
O
P
A
C
K
D7 D6 D5 D4 D3 D2 D1 D0
FIGURE 4. THREE-BYTE INSTRUCTION SEQUENCE
I3 I2 I1 I0
0
ID3 ID2 ID1 ID0
Device ID
External
Instruction
Opcode
Address
Register
Address
Pot/Bank
Address
0
S
T
A
R
T
0101
A2 A1 A0
A
C
K
RA P1 P0
A
C
K
SCL
SDA
S
T
O
P
II
N
C
2
I
N
C
n
D
E
C
1
D
E
C
n
RB
FIGURE 5. INCREMENT/DECREMENT INSTRUCTION SEQUENCE
N
C
1
SCL
SD A
V
W
/R
W
INC/DEC
CMD
ISSUED
VOLTAGE OUT
t
WRID
FIGURE 6. INCREMENT/DECREMENT TIMING LIMITS
X9279

X9279TV14I-2.7

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
IC DGT POT 100KOHM 256TP 14TSSOP
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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