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ADN8831ACPZ-REEL7

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21
Data Sheet ADN8831
Rev. A | Page 15 of 20
APPLICATIONS INFORMATION
04663-017
Chop1
–
+
Chop2
–
+
IN1P IN2P
IN2NIN1N
OUT1
OUT2
17.68kΩ
7.68kΩ
R
X
R
FB
R
TH
(10kΩ @ 25°C)
V
REF
V
REF
/2
R
7432
V
TEMPSET
5 6
V
OUT1
V
OUT2
Z
1
Z
2
TEC
LPF
SFB
SPGATE
SNGATE
LPGATE
LNGATE
LFB
PWM
LINEAR
THERMISTOR INPUT
AMPLIFIER
A
V
= R
FB
/(R
TH
+ R
X
) – R
FB
/R
PID COMPENSATOR
AMPLIFIER
A
V
= Z
2
/Z
1
MOSFET DRIVER
A
V
= 5
CONTROL
Figure 17. Signal Flow Block Diagram
SIGNAL FLOW
The ADN8831 integrates two auto-zero amplifiers defined
as the Chop1 amplifier and the Chop2 amplifier. Both of the
amplifiers can be used as standalone amplifiers, therefore, the
implementation of temperature control can vary. Figure 17
shows the signal flow through the ADN8831, and a typical
implementation of the temperature control loop using the Chop1
amplifier and the Chop2 amplifier.
In Figure 17, the Chop1 amplifier and the Chop2 amplifier are
configured as the thermistor input amplifier and the PID
compensation amplifier, respectively. The thermistor input
amplifier gains the thermistor voltage then outputs to the PID
compensation amplifier. The PID compensation amplifier then
compensates a loop response over the frequency domain.
The output from the compensation loop at OUT2 is fed to the
linear MOSFET gate driver. The voltage at LFB is fed with OUT2
into the PWM MOSFET gate driver. Including the external
transistors, the gain of the differential output section is fixed at 5.
For details on the output drivers, see the MOSFET Driver
Amplifier section.
THERMISTOR SETUP
The thermistor has a nonlinear relationship to temperature; near
optimal linearity over a specified temperature range can be
achieved with the proper value of R
X
placed in series with the
thermistor. First, the resistance of the thermistor must be
known, where
HIGH
TH
HIGH
MID
TH
MID
LOW
TH
LOW
TRR
TRR
TRR
@
@
@
=
=
=
T
LOW
and T
HIGH
are the endpoints of the temperature range and
T
MID
is the average. In some cases, with only B constant available ,
R
TH
is calculated using the following equation:
−=
R
R
TH
TT
BRR
11
exp
where:
R
TH
is a resistance at T[K].
R
R
is a resistance at T
R
[K].
R
X
is calculated using the following equation:
−+
−+
=
MID
HIGHLOW
HIGHLOWHIGH
MIDMID
LOW
X
RRR
RRRRRR
R
2
2
THERMISTOR AMPLIFIER (Chop1)
The Chop1 amplifier can be used as a thermistor input amplifier.
In Figure 17, the output voltage is a function of the thermistor
temperature. The voltage at OUT1 is expressed as
2
1
REF
FB
X
TH
FB
OUT1
V
R
R
RR
R
V ×
+−
+
=
where:
R
TH
is a thermistor.
R
X
is a compensation resistor.
R is calculated using the following equation:
CTH
X
RRR
°
+=
25@
V
OUT1
is centered around V
REF
/2 at 25°C. With the typical
values shown in Figure 17, an average temperature-to-voltage
coefficient is −25 mV/°C at a range of +5°C to +45°C.
ADN8831 Data Sheet
Rev. A | Page 16 of 20
04663-018
–15 5 25 45
0
2.5
65
0.5
1.0
1.5
2.0
TEMPERATURE(°C)
V
OUT1
(V)
Figure 18. V
OUT1
vs. Temperature
PID COMPENSATION AMPLIFIER (Chop2)
Use the Chop2 amplifier as the PID compensation amplifier.
The voltage at OUT1 feeds into the PID compensation amplifier.
The frequency response of the PID compensation amplifier is
dictated by the compensation network. Apply the temperature
set voltage at IN2P. In Figure 17, the voltage at OUT2 is calcu-
lated using the following equation:
)(
TEMPSETOUT1TEMPSETOUT2
VV
Z1
Z2
VV
The user sets the exact compensation network. This network
varies from a simple integrator to PI, PID, or any other type of
network. The user also determines the type of compensation
and component values because they are dependent on the thermal
response of the object and the TEC. One method for empirically
determining these values is to input a step function to IN2P,
therefore changing the target temperature, and adjusting the
compensation network to minimize the settling time of the TEC
temperature.
A typical compensation network for temperature control of
a laser module is a PID loop consisting of a very low frequency
pole and two separate zeros at higher frequencies. Figure 19
shows a simple network for implementing PID compensation.
To reduce the noise sensitivity of the control loop, an additional
pole is added at a higher frequency than the zeros. The bode
plot of the magnitude is shown in Figure 20. The unity-gain
crossover frequency of the feedforward amplifier is calculated
using the following equation:
TECGAIN
R3C1
f
80
2
1
dB0
To ensure stability, the unity-gain crossover frequency is to be
lower than the thermal time constant of the TEC and thermistor.
However, this thermal time constant is sometimes unspecified
making it difficult to characterize. There are many texts written
on loop stabilization, and it is beyond the scope of this data
sheet to discuss all methods and trade offs in optimizing
compensation networks.
ADN8831
CHOP2
–
+
IN2P IN2N
4 76
OUT1 OUT2
5
C1
CFC2
R2
R3
V
T
E
M
P
S
E
T
R1
04663-019
Figure 19. Implementing a PID Compensation Loop
04663-020
FREQUENCY (Hz Log Scale)
MAGNITUDE (Log Scale)
0dB
1
2πR3C1
R1
R3
1
2πR3C2
1
2πR1C1
1
2πC2 (R2 + R3)
R1
R2 || R3
Figure 20. Bode Plot for PID Compensation
With an ADN8831-EVALZ board, AN-695, an application note
shows how to determine the PID network components for a
stable TEC subsystem performance.
Data Sheet ADN8831
Rev. A | Page 17 of 20
MOSFET DRIVER AMPLIFIER
The ADN8831 has two separate MOSFET drivers: a switched
output or pulse-width modulated (PWM) amplifier, and a high
gain linear amplifier. Each amplifier has a pair of outputs that drive
the gates of external MOSFETs which, in turn, drive the TEC as
shown in Figure 17. A voltage across the TEC is monitored via
SFB (Pin 23) and LFB (Pin 27). Although both MOSFET drivers
achieve the same result, to provide constant voltage and high
current, their operation is different. The exact equations for the
two outputs are
)25.1(40 −−=
OUT2
BLFB
VVV
)25.1(5 −+=
OUT2
LFB
SFB
VVV
where:
V
OUT2
is the voltage at OUT2 (Pin 7).
V
B
is determined by V
DD
as
]V0.4[V5.1 <=
DDB
VV
]V0.4[V5.2 >=
DDB
VV
The voltage at OUT2 (Pin 7) is determined by the compensation
network that receives temperature set voltage and thermistor
voltage fed by the input amplifier. V
LFB
has a low limit of 0 V
and an upper limit of V
DD
. Figure 21 shows the graphs of these
equations.
0
2.5
5.0
LFB (V)
0
2.5
5.0
SFB (V)
–5.0
–2.5
0
2.5
5.0
0 0.25 0.75 1.25 1.75 2.25 2.75
VTEC (V)
LFB-SFB
04663-021
OUT2 (V)
Figure 21. OUT2 Voltage vs. TEC Voltage
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21

ADN8831ACPZ-REEL7

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Buy ADN8831ACPZ-REEL7
Manufacturer:
Analog Devices Inc.
Description:
Laser Drivers HIGH PRECISION/EFFICIENCY TEC CONTROLLER
Lifecycle:
New from this manufacturer.
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