CY8C4024LQI-S402T Datasheet CY8C4024LQI-S401, CY8C4025FNI-S402T, CY8C4024AZI-S413T | P1-P3

PSoC

4: PSoC 4000S Family

Datasheet

Programmable System-on-Chip (PSoC)

Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600

Document Number: 002-00123 Rev. *J Revised April 26, 2017

General Description

PSoC

4 is a scalable and reconfigurable platform architecture for a family of programmable embedded system controllers with an

ARM

Cortex

-M0+ CPU. It combines programmable and reconfigurable analog and digital blocks with flexible automatic routing.

The PSoC 4000S product family is a member of the PSoC 4 platform architecture. It is a combination of a microcontroller with standard

communication and timing peripherals, a capacitive touch-sensing system (CapSense) with best-in-class performance, programmable

general-purpose continuous-time and switched-capacitor analog blocks, and programmable connectivity. PSoC 4000S products will

be upward compatible with members of the PSoC 4 platform for new applications and design needs.

Features

32-bit MCU Subsystem

■ 48-MHz ARM Cortex-M0+ CPU

■ Up to 32 KB of flash with Read Accelerator

■ Up to 4 KB of SRAM

Programmable Analog

■ Single-slope 10-bit ADC function provided by Capacitance

sensing block

■ Two current DACs (IDACs) for general-purpose or capacitive

sensing applications on any pin

■ Two low-power comparators that operate in Deep Sleep

low-power mode

Programmable Digital

Programmable logic blocks allowing Boolean operations to be

performed on port inputs and outputs

Low-Power 1.71-V to 5.5-V Operation

■ Deep Sleep mode with operational analog and 2.5 A digital

system current

Capacitive Sensing

■ Cypress CapSense Sigma-Delta (CSD) provides best-in-class

signal-to-noise ratio (SNR) (>5:1) and water tolerance

■ Cypress-supplied software component makes capacitive

sensing design easy

■ Automatic hardware tuning (SmartSense™)

Serial Communication

■ Two independent run-time reconfigurable Serial

Communication Blocks (SCBs) with re-configurable I2C, SPI,

or UART functionality

LCD Drive Capability

■ LCD segment drive capability on GPIOs

Timing and Pulse-Width Modulation

■ Five 16-bit timer/counter/pulse-width modulator (TCPWM)

blocks

■ Center-aligned, Edge, and Pseudo-random modes

■ Comparator-based triggering of Kill signals for motor drive and

other high-reliability digital logic applications

Up to 36 Programmable GPIO Pins

■ 48-pin TQFP, 40-pin QFN, 32-pin QFN, 24-pin QFN, and

25-ball WLCSP packages

■ Any GPIO pin can be CapSense, analog, or digital

■ Drive modes, strengths, and slew rates are programmable

PSoC Creator Design Environment

■ Integrated Development Environment (IDE) provides

schematic design entry and build (with analog and digital

automatic routing)

■ Applications Programming Interface (API) component for all

fixed-function and programmable peripherals

Industry-Standard Tool Compatibility

■ After schematic entry, development can be done with

ARM-based industry-standard development tools

Document Number: 002-00123 Rev. *J Page 2 of 35

PSoC

4: PSoC 4000S Family

Datasheet

Contents

Functional Definition........................................................ 4

CPU and Memory Subsystem ..................................... 4

System Resources ...................................................... 4

Analog Blocks.............................................................. 5

Programmable Digital Blocks ...................................... 5

Fixed Function Digital.................................................. 5

GPIO ........................................................................... 6

Special Function Peripherals ....................................... 6

Pinouts .............................................................................. 7

Alternate Pin Functions ............................................... 8

Power............................................................................... 10

Mode 1: 1.8 V to 5.5 V External Supply .................... 10

Mode 2: 1.8 V ±5% External Supply.......................... 10

Development Support .................................................... 11

Documentation .......................................................... 11

Online ........................................................................ 11

Tools.......................................................................... 11

Electrical Specifications ................................................ 12

Absolute Maximum Ratings....................................... 12

Device Level Specifications....................................... 12

Analog Peripherals.................................................... 16

Digital Peripherals ..................................................... 19

Memory ..................................................................... 22

System Resources .................................................... 22

Ordering Information...................................................... 25

Packaging........................................................................ 27

Package Diagrams.................................................... 28

Acronyms........................................................................ 31

Document Conventions................................................. 33

Units of Measure ....................................................... 33

Revision History............................................................. 34

Sales, Solutions, and Legal Information...................... 35

Worldwide Sales and Design Support....................... 35

Products .................................................................... 35

PSoC® Solutions ...................................................... 35

Cypress Developer Community................................. 35

Technical Support ..................................................... 35

Document Number: 002-00123 Rev. *J Page 3 of 35

PSoC

4: PSoC 4000S Family

Datasheet

Figure 1. Block Diagram

PSoC 4000S devices include extensive support for

programming, testing, debugging, and tracing both hardware

and firmware.

The ARM Serial-Wire Debug (SWD) interface supports all

programming and debug features of the device.

Complete debug-on-chip functionality enables full-device

debugging in the final system using the standard production

device. It does not require special interfaces, debugging pods,

simulators, or emulators. Only the standard programming

connections are required to fully support debug.

The PSoC Creator IDE provides fully integrated programming

and debug support for the PSoC 4000S devices. The SWD

interface is fully compatible with industry-standard third-party

tools. The PSoC 4000S family provides a level of security not

possible with multi-chip application solutions or with

microcontrollers. It has the following advantages:

■ Allows disabling of debug features

■ Robust flash protection

■ Allows customer-proprietary functionality to be implemented in

on-chip programmable blocks

The debug circuits are enabled by default and can be disabled

in firmware. If they are not enabled, the only way to re-enable

them is to erase the entire device, clear flash protection, and

reprogram the device with new firmware that enables debugging.

Thus firmware control of debugging cannot be over-ridden

without erasing the firmware thus providing security.

Additionally, all device interfaces can be permanently disabled

(device security) for applications concerned about phishing

attacks due to a maliciously reprogrammed device or attempts to

defeat security by starting and interrupting flash programming

sequences. All programming, debug, and test interfaces are

disabled when maximum device security is enabled. Therefore,

PSoC 4000S, with device security enabled, may not be returned

for failure analysis. This is a trade-off the PSoC 4000S allows the

customer to make.

Peripherals

CPU Subsystem

System Interconnect (Single Layer AHB)

PSoC 4000S

Architecture

IOSS GPIO(5x ports)

I/O Subsystem

Peripheral Interconnect (MMIO)PCLK

SWD/TC

NVIC, IRQMUX

Cortex

M0+

48 MHz

FAST MUL

FLASH

32 KB

Read Accelerator

SPCIF

SRAM

4 KB

SRAM Controller

ROM

8 KB

ROM Controller

32-bit

AHB- Lite

2x SCB-I2C/SPI/UART

36x GPIOs, LCD

DeepSleep

Active/ Sleep

Power Modes

Digital DFT

Test

Analog DFT

System Resources

Lite

Power

Clock

Reset

Clock Control

IMO

Sleep Control

REFPOR

Reset Control

TestMode Entry

WIC

XRES

WDT

ILO

PWRSYS

5x TCPWM

CapSense

WCO

2x LP Comparator

High Speed I/ O Matrix & 2x Programmable I/O

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CY8C4024LQI-S402T

Mfr. #:

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Manufacturer:

Cypress Semiconductor

Description:

ARM Microcontrollers - MCU PSoC4

Lifecycle:

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CY8C4024LQI-S402T

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