Document Number: 002-00123 Rev. *J Page 14 of 35
PSoC
®
4: PSoC 4000S Family
Datasheet
GPIO
Notes
3. V
IH
must not exceed V
DDD
+ 0.2 V.
4. Guaranteed by characterization.
Table 5. GPIO DC Specifications
Spec ID# Parameter Description Min Typ Max Units
Details/
Conditions
SID57 V
IH
[3]
Input voltage high threshold 0.7 V
DDD
––
V
CMOS Input
SID58 V
IL
Input voltage low threshold – –
0.3
V
DDD
CMOS Input
SID241 V
IH
[3]
LVTTL input, V
DDD
< 2.7 V 0.7 V
DDD
–– –
SID242 V
IL
LVTTL input, V
DDD
< 2.7 V – –
0.3
V
DDD
–
SID243 V
IH
[3]
LVTTL input, V
DDD
2.7 V 2.0 – – –
SID244 V
IL
LVTTL input, V
DDD
2.7 V – – 0.8 –
SID59 V
OH
Output voltage high level V
DDD
–0.6 – – I
OH
= 4mA at 3V V
DDD
SID60 V
OH
Output voltage high level V
DDD
–0.5 – – I
OH
= 1mA at 3V V
DDD
SID61 V
OL
Output voltage low level – – 0.6
I
OL
= 4 mA at 1.8 V
V
DDD
SID62 V
OL
Output voltage low level – – 0.6 I
OL
= 10 mA at 3 V V
DDD
SID62A V
OL
Output voltage low level – – 0.4 I
OL
= 3mA at 3V V
DDD
SID63 R
PULLUP
Pull-up resistor 3.5 5.6 8.5
k
–
SID64 R
PULLDOWN
Pull-down resistor 3.5 5.6 8.5 –
SID65 I
IL
Input leakage current (absolute
value)
–– 2nA25°C, V
DDD
= 3.0 V
SID66 C
IN
Input capacitance – – 7 pF –
SID67
[4]
V
HYSTTL
Input hysteresis LVTTL 25 40 –
mV
V
DDD
2.7 V
SID68
[4]
V
HYSCMOS
Input hysteresis CMOS 0.05 × V
DDD
–– V
DD
< 4.5 V
SID68A
[4]
V
HYSCMOS5V5
Input hysteresis CMOS 200 – – V
DD
> 4.5 V
SID69
[4]
I
DIODE
Current through protection diode to
V
DD
/V
SS
– – 100 µA–
SID69A
[4]
I
TOT_GPIO
Maximum total source or sink chip
current
– – 200 mA –
Table 6. GPIO AC Specifications
(Guaranteed by Characterization)
Spec ID# Parameter Description Min Typ Max Units
Details/
Conditions
SID70 T
RISEF
Rise time in fast strong mode 2 – 12
ns
3.3 V V
DDD
, Cload =
25 pF
SID71 T
FALLF
Fall time in fast strong mode 2 – 12
3.3 V V
DDD
, Cload =
25 pF
SID72 T
RISES
Rise time in slow strong mode 10 – 60 –
3.3 V V
DDD
, Cload =
25 pF
SID73 T
FALLS
Fall time in slow strong mode 10 – 60 –
3.3 V V
DDD
, Cload =
25 pF