LX1562IM Datasheet LX1562IDM, LX1562IM, LX1563IDM | P13-P15

S ECOND-GENERATION POWER FACTOR CONTROLLER

LX1562/1563

PRODUCT DATABOOK 1996/1997

Rev. 1.3a 8/30

P RODUCTION DATA SHEET

FUNCTIONAL DESCRIPTION

The operation of the IC is best described by referring to the

block-diagram. The output of the multiplier stage generates a

voltage proportional to the product of the rectified AC line and

the output of the error amplifier. This voltage serves as the

reference for the inductor peak current that is sensed by the

resistor in series with the external power MOSFET. When the

sense voltage exceeds this threshold, C.S. comparator trips and

resets the latch as well as turning the power MOSFET off.

The energy stored during switch on-time is now transferred

and stored in the output capacitor, causing the inductor current

to ramp down. When current reaches zero level (inductor runs

out of energy) , boost diode (D1) stops conducting and the

residual inductor energy and the drain to source capacitance of

the power MOSFET create an LC tank circuit which causes drain

voltage to resonate at this frequency. The resonating voltage is

detected by the secondary winding (Idet winding) of the in-

ductor. When this voltage swings negative “I detect” pin senses

it and activates the blanking circuit , sets the latch, and turns

power MOSFET on, repeating the cycle. This operation contin-

ues for the entire cycle of the AC rectified input resulting in an

inductor current as shown in Figure 23. The high frequency

content of this current is then filtered by the input capacitor

(C1) resulting in a sine wave input current in phase with the

AC line voltage.

Output voltage regulation is accomplished when the error

amplifier compares this voltage to an internal 2.5V reference

and generates an error voltage. This voltage then controls the

amplitude of the multiplier output adjusting the peak inductor

current proportional to the load and line variations, maintain-

ing a well regulated voltage.

IC DESCRIPTION

UNDERVOLTAGE LOCK OUT

The LX1562/63 undervoltage lock-out is designed to maintain

an ultra low quiescent current of less than 300µA, while guar-

anteeing the IC is fully functional before the output stage is

activated. Comparing this to the SG3561A device, a 40% reduc-

tion in start-up current is achieved, resulting in 40% less power

dissipation in the start-up resistor. This is especially important

in electronic ballast applications that are designed to operate in

harsh environments, with convection cooling as the only means

of heat dissipation.

Figure 24 shows an efficient supply voltage using the ultra

low start-up current of the LX1562 in conjunction with a boot-

strap winding off of the power transformer. Circuit operation

is as follows:

The start-up capacitor (C1) is charged by current through

resistor (R1) minus the start-up current drawn by the IC. This

resistor is typically chosen to provide 2X the maximum start-up

current at low line to guarantee start-up under the worst case

condition. Once the capacitor voltage reaches the start-up

threshold, the IC turns on, starting the switching cycle. The

operation of the IC demands an increase in operating current

which results in discharging the capacitor. During the discharge

cycle, the flyback voltage of the auxiliary winding is rectified

and filtered via rectifier (D1) and charges the capacitor above

the minimum operating voltage of the device and takes over as

the supply voltage. The start-up capacitor and auxiliary wind-

ing must be selected such that it satisfies worst case IC condi-

tions. Figure 25 shows start-up time and voltage of capacitor C1.

Table 1 shows the start-up voltage and hysteresis for LX1562

and LX1563. The LX1562 is used for stand alone pre-regulator

applications while LX1563 is ideal for applications where sup-

ply voltage is derived elsewhere and requires less than 14V

start-up.

Part # Start-Up Hysteresis

Voltage Voltage

LX1562 13.1V 5.2V

LX1563 9.8V 2.1V

T ABLE 1

Rectified

AC Line

GND

LX1562

GND

< 300µA

> 300µA

FIGURE 24 — TYPICAL APPLICATION OF START-UP CIRCUITRY

Inductor Peak

Current Envelope

Average

AC Input Current

OFF

FIGURE 23 — INDUCTOR CURRENT

OBSOLETE PRODUCT

NOT RECOMMENDED FOR NEW DESIGNS

S ECOND-GENERATION POWER FACTOR CONTROLLER

LX1562/1563

PRODUCT DATABOOK 1996/1997

Rev. 1.3a 8/30

RODUCTION DATA SHEET

IC DESCRIPTION

ERROR AMPLIFIER

The error amplifier is an internally compensated op-amp with

access to the inverting input and the output pin. The non-

inverting input is internally connected to the voltage reference

and is not available for external connection. The amplifier is

designed for an open loop gain of 80dB, along with a typical

bandwidth of 1.7MHz and 49 degrees of phase margin. The

boost output voltage of the power factor pre-regulator is di-

vided down and monitored by the inverting input. Input bias

current (0.5µA max) can cause an output voltage error that is

equal to the product of the input bias current and the value of

the upper divider resistor. The amplifier's output is available

for external loop compensation. Typically, the loop bandwidth

is set below 10Hz in order to reject the low frequency ripple

associated with 2X the line frequency. For example, if the

error amplifier is configured as an integrator with 1.2Hz band-

width, it will have 40dB ripple rejection at 120Hz frequency.

This means that if the output of the error amp is allowed to

have 100mV of ripple, the boost converter must be limited to

less than 10V of ripple on its output.

To prevent boost output run away condition that may occur

during removal of the output load, a separate comparator moni-

tors the E.A. output voltage and compares it to an internal 1.8V

reference. When load is removed, E.A. output swings lower

than 1.8V, trips the comparator and turns output driver off till

the inverting input voltage drops below 2.5V. At this point, the

E.A. output swings positive, turns the output driver back on

and repeats the cycle until the load is returned to normal con-

dition.

To reduce output overshoot during line and load transients,

the E.A. output is clamped to two diode drops above the refer-

ence voltage. This prohibits the amplifier from being satu-

rated, allowing it to recover faster thus minimizing the boost

voltage overshoot.

VOLTAGE REFERENCE (continued)

HYST

DISCHARGE

START

BOOTSTRAP

WINDING

& C

TIME CONSTANT

DISCHARGE

TIME

FIGURE 25 — START-UP CAPACITOR VOLTAGE

VOLTAGE REFERENCE

The voltage reference is a low drift bandgap design which pro-

vides a stable +2.5V output with maximum of ±1.5% initial ac-

curacy. This voltage is internally tied to the non-inverting in-

put of the amplifier and is not available for external connec-

tion. The initial accuracy of the reference includes error am-

plifier input offset voltage. Figure 26 shows typical variation of

the reference voltage vs. temperature.

FIGURE 27 — THE AMPLIFIER CONFIGURED AS AN INTEGRATOR

FOR LOOP COMPENSATION

From I

DET

Logic

1.8V

OUTPUT

DRIVE

REF

R10

Bias

BW =

>> I

BIAS

f = Line Freq.

2.47

2.45

) Ambient Temperature - (°C)

2.52

) Reference Voltage - (V)

2.48

-50

-25 0

50 75 100 125

= 12V

= 1nF

2.46

2.49

2.50

2.51

FIGURE 26 — REFERENCE VOLTAGE (Including Offset) vs. TEMPERATURE

OBSOLETE PRODUCT

NOT RECOMMENDED FOR NEW DESIGNS

S ECOND-GENERATION POWER FACTOR CONTROLLER

LX1562/1563

PRODUCT DATABOOK 1996/1997

Rev. 1.3a 8/30

P RODUCTION DATA SHEET

IC DESCRIPTION

MULTIPLIER

The LX1562/63 features a one quadrant multiplier stage having

two inputs. One (V

) is internally driven by a DC voltage

which is the difference of E.A. output and V

REF

. The other (V

is connected to an external resistor divider monitoring the rec-

tified AC line. The output of the multiplier which is a function

of both inputs, controls inductor peak current during each cycle

of operation. This allows the inductor peak current to follow

the AC line thus forcing the average input current to be sinu-

soidal.

The multiplier is in the linear region if the V

input is limited

to less than 2V and the E.A. output is kept below 3.5V under all

line and load conditions. The output is internally clamped to

1.24V typically to limit the MOSFET peak current during turn on

or under excessive load conditions. The equation below de-

scribes the relationship between multiplier output voltage and

the its inputs.

= K

EA0

- V

REF

)

where: K = Multiplier gain (typ. 0.65)

= Voltage at pin3 (0 to 2V)

EA0

= Error amp output voltage (2.5 to 3.5V)

= Multiplier output voltage

FIGURE 28 — MULTIPLIER SECTION

for an external RC filter otherwise required for proper opera-

tion of the circuit. This function is described in detail under

“current detect logic” section.

The current sense comparator voltage is limited by an inter-

nal 1.24V (typ.) voltage clamp of the multiplier output. There-

fore maximum switch current is typically given by:

PK (MAX)

= 1.24V / R

Maximum switch peak current happens at full load and mini-

mum line conditions.

2.5V

REF

INV.

INPUT

E.A.

OUTPUT

MULT.

OUTPUT

C.S.

INPUT

CURRENT SENSE COMPARATOR

Current sense comparator is configured as a PNP input differ-

ential stage with one input internally tied to the multiplier out-

put and the other available for current sensing. Current is con-

verted to voltage using an external sense resistor in series with

the external power MOSFET. When sense voltage exceeds the

threshold set by the multiplier output, the current sense com-

parator terminates the gate drive to the MOSFET and resets the

PWM latch. The latch insures that the output remains in a low

state after the switch current falls back to zero. The LX1562/63

features a leading edge blanking circuit that eliminates the need

CURRENT DETECT LOGIC

The function of “current detect logic” is to sense the operating

state of the boost inductor and to enable the output driver

accordingly. To achieve this, the downward slope of the in-

ductor current is indirectly detected by monitoring the voltage

across a separate winding and connecting it to the detector

input “I

DET

” pin. Once the inductor current reaches ground

level, the voltage across the winding reverses polarity and

changes the “I

DET

” input and the comparator output to the low

state (See Figure 30). When comparator changes state, it sets

the latch and turns on the output driver for a period of 1µs

(typ.) regardless of any changes in the latch output (Q) within

this period. This ensures that if the C.S. comparator changes

state due to any turn-on spike, the driver output remains on

and does not turn off prematurely.

However if the spike lasts longer than 1µs, the output driver

turns off and the MOSFET stops conducting. This type of digi-

tal current sense blanking which is not amplitude dependent

has higher noise immunity than the commonly used external

RC filtering, allowing for more flexibility in board layout.

Since inductor voltage swings both positive and negative,

internal voltage clamping is provided to protect the IC. The

PIN 7

1µsec

Blank

Logic

Circuit

FIGURE 29 — CURRENT SENSE SECTION

OBSOLETE PRODUCT

NOT RECOMMENDED FOR NEW DESIGNS

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P18 P19-P21 P22-P24 P25-P25

LX1562IM

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LX1562IM

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