PCA9511A_4 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 04 — 19 August 2009 7 of 24
NXP Semiconductors
PCA9511A
Hot swappable I
2
C-bus and SMBus bus buffer
turn-on delay and the falling edge slew rate. The output falling edge slew rate is a function
of the internal maximum slew rate which is a function of temperature, V
CC
and process, as
well as the load current and the load capacitance.
8.5 Rise time accelerators
During positive bus transitions a 2 mA current source is switched on to quickly slew the
SDA and SCL lines HIGH once the input level of 0.6 V for the PCA9511A is exceeded.
The rising edge rate should be at least 1.25 V/µs to guarantee turn on of the accelerators.
The built-in ∆V/∆t rise time accelerators on all SDA and SCL lines requires the bus pull-up
voltage and supply voltage (V
CC
) to be the same.
8.6 READY digital output
This pin provides a digital flag which is LOW when either ENABLE is LOW or the start-up
sequence described earlier in this section has not been completed. READY goes HIGH
when ENABLE is HIGH and start-up is complete. The pin is driven by an open-drain
pull-down capable of sinking 3 mA while holding 0.4 V on the pin. Connect a resistor of
10 kΩ to V
CC
to provide the pull-up.
8.7 ENABLE low current disable
Grounding the ENABLE pin disconnects the backplane side from the card side, disables
the rise time accelerators, drives READY LOW, disables the bus precharge circuitry, and
puts the part in a low current state. When the pin voltage is driven all the way to V
CC
, the
part waits for data transactions on both the backplane and card sides to be complete
before reconnecting the two sides.
8.8 Resistor pull-up value selection
The system pull-up resistors must be strong enough to provide a positive slew rate of
1.25 V/µs on the SDA and SCL pins, in order to activate the boost pull-up currents during
rising edges. Choose maximum resistor value using the formula given in Equation 1:
(1)
where R is the pull-up resistor value in Ω, V
CC(min)
is the minimum V
CC
voltage in volts,
and C is the equivalent bus capacitance in picofarads (pF).
In addition, regardless of the bus capacitance, always choose R ≤ 65.7 kΩ for V
CC
= 5.5 V
maximum, R ≤ 45 kΩ for V
CC
= 3.6 V maximum. The start-up circuitry requires logic HIGH
voltages on SDAOUT and SCLOUT to connect the backplane to the card, and these
pull-up values are needed to overcome the precharge voltage. See the curves in Figure 5
and Figure 6 for guidance in resistor pull-up selection.
R 800 10
3
×
V
CC min()
0.6–
C
-----------------------------------
≤
