IDT
®
15 Output PCIe G2/QPI Differential Buffer with 2:1 Input Mux 1578—01/18/11
9EX21501
15 Output PCIe G2/QPI Differential Buffer with 2:1 Input Mux
8
Datasheet
Electrical Characteristics - Skew and Differential Jitter Parameters
TA = T
COM
or T
IND;
Supply Voltage VDD/VDDA = 3.3 V +/-5%, See Test Loads for Loading Conditions
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS NOTES
CLK_IN, DIF[x:0], 100M t
SPO_PLL100M
Input-to-Output Skew in PLL mode
nominal value @ 25°C, 3.3V
925 1019 1125 ps 1,2,4,5,8
CLK_IN, DIF[x:0], 133M t
SPO_PLL133M
Input-to-Output Skew in PLL mode
nominal value @ 25°C, 3.3V
1100 1120 1200 ps 1,2,4,5,8
CLK_IN, DIF[x:0] t
PD_BYP
Input-to-Output Skew in Bypass mode
nominal value @ 25°C, 3.3V
4 4.6 5.2 ns 1,2,3,5,8
CLK_IN, DIF[x:0] t
DSPO_PLL
Input-to-Output Skew Varation in PLL
mode across voltage and temperature
|258| |350| ps
1,2,3,5,6
,8
CLK_IN, DIF[x:0] t
DSPO_BYP
Input-to-Output Skew Varation in
Bypass mode across voltage and
temperature
|771| |900| ps
1,2,3,5,6
,8
CLK_IN, DIF[x:0] t
DTE
Random Differential Tracking error
beween two 9EX2 devices in Hi BW
Mode
210
ps
(rms)
1,2,3,5,8
,12
CLK_IN, DIF[x:0] t
DSSTE
Random Differential Spread Spectrum
Tracking error beween two 9EX2
devices in Hi BW Mode
20 75 ps
1,2,3,5,8
,13
DIF{x:0] t
SKEW_ALL
Output-to-Output Skew
across all outputs
(Common to Bypass and PLL mode)
75 150 ps 1,2,8
PLL Jitter Peaking j
eak-hibw
High Bandwidth 0 2.3 3 dB 7,8
PLL Jitter Peaking j
eak-lobw
Low Bandwidth 0 2.5 3 dB 7,8
PLL Bandwidth pll
HIBW
High Bandwidth 2 2.5 4 MHz 8,9
PLL Bandwidth pll
LOBW
Low Bandwidth 0.7 0.87 1.4 MHz 8,9
Duty Cycle t
DC
Measured differentially, PLL Mode 45 49.6 55 % 1
Duty Cycle Distortion t
DCD
Measured differentially, Bypass Mode
@100MHz
-2 0.2 2 % 1,10
PLL mode 27 50 ps 1
Additive Jitter in Bypass Mode 20 50 ps 1
Notes for preceding table:
7
Measured as maximum pass band
ain. At frequencies within the loop BW, hi
hest point of ma
nification is called PLL jitter peakin
.
8.
Guaranteed by desi
n and characterization, not 100% tested in production.
9
Measured at 3 db down or half power point.
10
Duty cycle distortion is the difference in duty cycle between the output and the input clock when the device is operated in bypass mo
11
Measured from differential waveform
13
Differential spread spectrum tracking error is the difference in spread spectrum tracking between two ICS9EX21501 devices This
parameter is measured at the outputs of two separate ICS9EX21501 devices driven by a single CK410B+ in Spread Spectrum mode.
The ICS9EX21501's must be set to high bandwidth. The spread spectrum characteristics are: maximum of 0.5%, 30-33KHz
modulation frequency, triangle profile.
6.
Lon
-term variation from nominal of in
ut-to-out
ut skew over tem
erature and volta
e for a sin
le device.
12.
This parameter is measured at the outputs of two separate ICS9EX21501 devices driven by a single CK410B+. The
ICS9EX21501's must be set to high bandwidth. Differential phase jitter is the accumulation of the phase jitter not shared by the outputs
(eg. not including the affects of spread spectrum). Target ranges of consideration are agents with BW of 1-22Mhz and 11-33Mhz.
Jitter, Cycle to cycle t
jcyc-cyc
1
Measured into fixed 2 pF load cap. Input to output skew is measured at the first output edge following the corresponding input.
2
Measured from differential cross-point to differential cross-point.
3
All Bypass Mode Input-to-Output specs refer to the timing between an input edge and the specific output edge created by it.
4
This
arameter is deterministic for a
iven device
5
Measured with sco
e avera
in
on to find mean value.
