3
LTC1623
ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
T
A
= 25°C, V
CC
= 5V unless otherwise specified. C
GA
= 1000pF, C
GB
= 1000pF
PIN FUNCTIONS
UUU
DATA: (Pin 1) Open-Drain Connected Serial Data Inter-
face. Must be pulled high to V
CC
with external resistor. The
pull-up current must be limited to 350µA.
CLK: (Pin 2) Serial Clock Interface. Must be pulled high to
V
CC
with external resistor. The pull-up current must be
limited to 350µA.
AD0: (Pin 3) Lower Three-State Programmable Address
Pin. Must be connected directly to V
CC
, GND, or V
CC
/2
(using two resistors ≤ 1M). Do not float this pin.
GND: (Pin 4) Ground.
AD1: (Pin 5) Higher Three-State Programmable Address
Pin. Must be connected directly to V
CC
, GND, or V
CC
/2
(using two resistors ≤ 1M). Do not float this pin.
GB: (Pin 6) Gate Drive to External High-Side Switch. Fully
enhanced by internal charge pump. Controlled by 2nd
LSB of command byte.
GA: (Pin 7) Gate Drive to External High-Side Switch. Fully
enhanced by internal charge pump. Controlled by LSB of
command byte.
V
CC
: (Pin 8) Input Supply Voltage. Range from 2.7V to
5.5V.
V
IL
AD0 and AD1 Input Low Voltage V
CC
= 2.7V to 5.5V ● 0.2 V
V
IH
AD0 and AD1 Input High Voltage V
CC
= 2.7V to 5.5V ● V
CC
– 0.2 V
V
OL
Data Output Low Voltage V
CC
= 2.7 to 5.5V, I
PULLUP
= 350µA ● 0.22 0.4 V
C
IN
Input Capacitance 5pF
(DATA, CLK, AD0, AD1)
I
IN
Input Leakage Current (DATA, CLK) ±1 µA
Input Leakage Current(AD0, AD1) ±250 nA
SMBus Related Specs (Note 6)
f
SMB
SMBus Operating Frequency 10 100 kHz
t
SUSTA
Start Condition Setup Time 4.7 µs
t
BUF
Bus Free Time Between Stop and Start 4.7 µs
t
HDSTA
Start Condition Hold Time 4.0 µs
t
SUSTP
Stop Condition Setup Time 4.0 µs
t
HDDAT
Data Hold Time 300 ns
t
SUDAT
Data Setup Time 250 ns
t
LOW
Clock Low Period 4.7 µs
t
HIGH
Clock High Period 4.0 50 µs
t
f
Clock /Data Fall Time 300 ns
t
r
Clock/Data Rise Time 1000 ns
I
PULLUP
Current Through External Pull-Up (Data Pull-Down Current Capacity) 100 350 µA
Resistor on DATA Pin V
CC
= 2.7V to 5.5V
Note 4: ON is enabled upon receiving the Stop condition from the SMBus
master.
Note 5: OFF is enabled upon receiving the Stop condition from the SMBus
master.
Note 6: SMBus timing specs are guaranteed but not tested.
The
● denotes the specifications which apply over the full operating
temperature range.
Note 1: Approximately 3% hysteresis is provided to ensure stable
operation and eliminate false triggering by minor V
CC
glitches.
Note 2: Measured from V
CC
> V
UVLO
to SMBus ready for data input.
Note 3: The oscillator frequency is not tested directly but is inferred from
turn-on time.