REVISION G 12/19/14
85314I-01 DATA SHEET
5 Low Skew, 1-to-5
Differential-to-2.5V/3.3V LVPECL Fanout Buffer
TABLE 4D. LVPECL DC CHARACTERISTICS, V
CC
= 2.375V TO 3.8V, V
EE
= 0V, TA = -40°C TO 85°C
TABLE 5. AC CHARACTERISTICS, V
CC
= 2.375V TO 3.8V, V
EE
= 0V, TA = -40°C TO 85°C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
f
MAX
Output Frequency
CLK0, nCLK0 700 MHz
CLK1 300 MHz
tjit (Ø) RMS Phase Jitter (Random); NOTE 5
Integration Range:
(12kHz - 20MHz)
0.05 ps
tp
LH
Propagation Delay, Low to High; NOTE 1 1.0 1.4 1.8 ns
tsk(o)
Output Skew;
NOTE 3, 6
TSSOP Package 30 ps
SOIC Package 50 ps
tsk(pp) Part-to-Part Skew; NOTE 4, 6 350 ps
t
R
/ t
F
Output Rise/Fall Time 20% to 80% 200 700 ps
odc Output Duty Cycle
CLK0, nCLK0
ƒ ≤ 700MHz
45 55 %
CLK1
ƒ ≤ 250MHz
45 55 %
All parameters measured at f
MAX
unless noted otherwise.
The cycle-to-cycle jitter on the input will equal the jitter on the output. The part does not add jitter
NOTE 1: Measured from the differential input crossing point to the differential output crossing point.
NOTE 2: Measured from V
CC
/2 input crossing point to the differential output crossing point.
NOTE 3: Defi ned as skew between outputs at the same supply voltage and with equal load conditions.
Measured at the output differential cross points.
NOTE 4: Defi ned as skew between outputs on different devices operating at the same supply voltages
and with equal load conditions. Using the same type of inputs on each device, the outputs are measured
at the differential cross points.
NOTE 5: Please refer to the Phase Noise Plot.
NOTE 6: This parameter is defi ned in accordance with JEDEC Standard 65.
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
OH
Output High Voltage; NOTE 1 V
CC
- 1.4 V
CC
- 0.9 V
V
OL
Output Low Voltage; NOTE 1 V
CC
- 2.0 V
CC
- 1.7 V
V
SWING
Peak-to-Peak Output Voltage Swing 0.6 1.0 V
NOTE 1: Outputs terminated with 50Ω to V
CC
- 2V.
