6©2015 Integrated Device Technology, Inc Revision A December 2, 2015
843S1333D Data Sheet
Application Information
Power Supply Filtering Technique
As in any high speed analog circuitry, the power supply pins are
vulnerable to random noise. To achieve optimum jitter performance,
power supply isolation is required. The 843S1333D provides
separate power supplies to isolate any high switching noise from the
outputs to the internal PLL. V
CC
and V
CCA
should be individually
connected to the power supply plane through vias, and 0.01µF
bypass capacitors should be used for each pin. Figure 1 illustrates
this for a generic V
CC
pin and also shows that V
CCA
requires that an
additional 10 resistor along with a 10F bypass capacitor be
connected to the V
CCA
pin.
Figure 1. Power Supply Filtering
Crystal Input Interface
The 843S1333D has been characterized with 18pF parallel resonant
crystals. The capacitor values, C1 and C2, shown in Figure 2 below
were determined using a 20MHz, 18pF parallel resonant crystal and
were chosen to minimize the ppm error. The optimum C1 and C2
values can be slightly adjusted for different board layouts. External
tuning capacitor must be used for proper operation.
Figure 2. Crystal Input Interface
V
CC
V
CCA
3.3V
10µF0.01µF
0.01µF
XTAL_IN
XTAL_OUT
X1
18pF Parallel Crystal
C1
28pF
C2
28pF
