MAX900–MAX903
High-Speed, Low-Power Voltage Comparators
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Definitions of Terms
V
OS
Input Offset Voltage: Voltage applied
between the two input terminals to obtain
TTL-logic threshold (+1.4V) at the
output.
t
pd+ (D)
Latch Disable-to-Output High Delay:
The propagation delay measured from
the latch-signal crossing the TTL
threshold in a low-to-high transition to
the point of the output crossing TTL
threshold in a low-to-high transition.
V
IN
Input Voltage Pulse Amplitude: Usually
set to 100mV for comparator
specifications.
t
pd- (D)
Latch Disable-to-Output Low Delay:
The propagation delay measured from
the latch-signal crossing the TTL
threshold in a low-to-high transition to
the point of the output crossing TTL
threshold in a high-to-low transition.
V
OD
Input Voltage Overdrive: Usually set to
5mV and in opposite polarity to V
IN
for
comparator specifications.
t
s
Minimum Setup Time: The minimum
time before the negative transition of the
latch signal that an input signal change
must be present in order to be acquired
and held at the outputs.
t
pd+
Input-to-Output High Delay: The
propagation delay measured from the
time the input signal crosses the input
offset voltage to the TTL-logic threshold
of an output low-to-high transition
t
h
Minimum Hold Time: The minimum time
after the negative transition of the latch
signal that an input signal must remain
unchanged in order to be acquired and
held at the output.
t
pd-
Input-to-Output Low Delay: The
propagation delay measured from the
time the input signal crosses the input
offset voltage to the TTL-logic threshold
of an output high-to-low transition.
t
pw
(D) Minimum Latch-Disable Pulse Width:
The minimum time that the latch signal
must remain high in order to acquire and
hold an input-signal change.
